[News] From Technical Prowess to Integration Capability, TSMC and Intel Target Advanced Packaging to Seize Ecosystem Opportunities

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Driven by the AI chip wave, “advanced packaging” emerges as the hottest technology in the semiconductor industry. Its significance extends beyond computational power demands, as the escalating cost of semiconductor processes and the limits of Moore’s Law make the “integration capability” of advanced packaging a crucial weapon for industry players to break through.

According to a report from TechNews, TSMC, Intel, and Samsung have all been deeply involved in advanced packaging for many years and have already introduced corresponding solutions. However, these semiconductor giants are not only focused on this aspect.

In addition to their own technologies, they are actively fostering supply chains, setting standards, and building ecosystems. By accelerating the development of advanced packaging technology, they are also laying the groundwork for their future influence.

Intel, for instance, has chosen to start with standardization by proposing the Universal Chiplet Interconnect Express (UCIe) alliance. Through open specifications and standardized connections, the protocol directly adopts mature standards like PCI Express (PCIe) and the recently developed Compute Express Link (CXL).

The reason for starting with chiplet technology is that in recent years, more and more semiconductor companies have discovered that designing chips using Chiplet architecture and integrating them through advanced packaging technology is more cost-effective than traditional System-on-Chip (SoC) approaches.

Therefore, Intel’s focus on connecting chiplets through standards like UCIe is aimed at providing a standardized interface stack for complete chiplet integration. UCIe supports 2D, 2.5D, and bridge packaging, with future development expected to include support for 3D packaging as well.

Intel’s Packaging Test Technology Development Department’s Senior Chief Engineer, Zhiguo Qian, directly involved in the UCIe Alliance, emphasizes that advanced packaging has become a crucial aspect of semiconductor development, particularly in ensuring the continuation of Moore’s Law.

Qian further points out that when considering the impact of the UCIe standard on the advanced packaging industry, it indeed establishes a standard for interconnecting chiplets within SoCs. This was the original intent behind Intel’s promotion of the UCIe standard alliance.

Currently, advanced packaging is mostly divided into different structures like 2.5D and 3D, and some even classify it as 2.1D or 2.2D, showcasing diverse structural designs across the industry.

However, within these structures, each company has its own proprietary interface solutions, and some even offer multiple solutions. Therefore, to meet customer demands, these standard interconnections must not only be at the forefront of technology but also be compatible with various standards that are open and do not incur any licensing fees.

On the other hand, the UCIe alliance has established various standards, such as the required packaging architectures and interface wiring designs, to achieve the desired performance levels. These standards provide guidelines for customers seeking advanced packaging solutions. By adhering to UCIe standards, customers can anticipate the performance of their chips, without the need for trial and error(in the IC designing stage).

Currently, companies participating in the UCIe alliance include Qualcomm, AMD, Arm, NVIDIA, TSMC, ASE Group, Winbond Electronics, and Applied Materials, among others, along with semiconductor giants like Samsung. Additionally, Google Cloud, Microsoft, and Meta are members, alongside over 120 other companies.

• TSMC Propels 3D Fabric Alliance

TSMC is also focused on ecosystem development, as evidenced by its announcement of the 3DFabric Alliance within the Open Innovation Platform (OIP) during the 2022 Open Innovation Platform Ecosystem Forum.

In fact, the 3DFabric Alliance is built upon TSMC’s 3DFabric technology introduced in 2020. This technology encompasses a comprehensive solution ranging from advanced processes to silicon stacking and advanced packaging technologies such as CoWoS and InFO.

With an established customer base for its 3DFabric technology, TSMC expanded it into an alliance in 2022. The goal is to assist customers in achieving rapid implementation of chip and system-level innovations while strengthening TSMC’s influence in advanced packaging.

The 3DFabric Alliance marks TSMC’s sixth open innovation platform alliance and is the semiconductor industry’s first alliance aimed at accelerating innovation and enhancing the 3D Integrated Circuit (3D IC) ecosystem in collaboration with partners.

This alliance includes companies in electronic design automation (EDA), silicon intellectual property (IP), design center alliances (DCA)/value chain alliances (VCA), memory, outsourced packaging testing (OSAT), and substrate and testing. Members include Ansys, Cadence, Siemens, ARM, Micron, Samsung, SK Hynix, Amkor, ASE, Advantest, and more.

In addition to establishing the alliance, TSMC also introduced the 3Dblox standard during the alliance’s inception. This standard integrates the design ecosystem with validated EDA tools and processes to support 3DFabric technology.

The purpose of this standard is to break the complexity of 3D IC design caused by each EDA supplier using its preferred language. Through the modular 3Dblox standard, key physical stacking and logic connection information in 3D IC design are standardized in a single format, simplifying input and significantly enhancing interoperability among different tools in 3D IC design.

From Intel’s UCIe standard to TSMC’s 3DFabric alliance and 3Dblox standard, it’s evident that in the era of advanced packaging, the key to solidifying the positions and market shares of semiconductor giants lies not only in their individual technological breakthroughs but also in their ability to coordinate and integrate the upstream and downstream industries.

Read more

• [News] The Era of Heterogeneous Integration Approaches: Who Shall Dominate the Advanced Packaging Field?

(Photo credit: TSMC)