[News] Outpacing Samsung or the End of Race? Kioxia Aims 1000-layer NAND by 2027

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After ending production cuts amidst a recovery in the memory industry, Kioxia disclosed its plans on the 3D NAND roadmap last week. According to reports from PC Watch and Blocks & Files, Kioxia stated that achieving a 1,000-layer level by 2027 would be possible.

According to the reports, the number of 3D NAND layers has generally increased from 24 in 2014 to 238 in 2022, representing a tenfold rise over eight years. Kioxia stated that achieving a 1,000-layer level by 2027 would be possible at a rate of increase of 1.33 times per year.

The Japanese memory chipmaker seems to be more ambitious than Samsung regarding the battle of layers. In May, Samsung revealed its target to release advanced NAND chips with over 1000 layers by 2030. According to Wccftech, the South Korean memory giant plans to apply new ferroelectric materials on the manufacturing of NAND to achieve this goal.

According to the latest analysis from TrendForce, Kioxia has benefited from the recovery of the memory industry, recently receiving subsidies from the Japanese government and additional financing from a consortium of banks. Furthermore, the company plans to launch an IPO by the end of the year. These measures have provided Kioxia with ample financial resources to pursue technological advancements and cost optimization.

TrendForce further notes that Kioxia has ambitious plans to achieve 1000-layer technology by 2027, which is the highest number of layers announced by any manufacturer so far. However, to reach the milestone, it will be necessary to transition from TLC (3 bits per cell) to QLC (4 bits per cell), and possibly even to PLC (5 bits per cell). The technical challenges involved are significant, and whether Kioxia can achieve this market milestone by 2027 remains to be seen.

The Battle of Layers between Memory Giants

Kioxia and its partner Western Digital showcased their 218-layer technology in 2023 following the 162-layer milestone. Its current announcement to achieve the 1000-layer technology by 2027 would be a huge leap from that.

The battle of layers between memory giants has been intensifying as other memory heavyweights had already surpassed the 200-layer milestone. Earlier in April, Samsung confirmed that it has begun mass production for its one-terabit (Tb) triple-level cell (TLC) 9th-generation vertical NAND (V-NAND), with the number of layers reaching 290, according an earlier report by The Korea Economic Daily. For now, the company aims to stack V-NAND to over 1000 layers by 2030.

SK Hynix unveiled the world’s highest-layer 321-layer NAND flash memory samples in August 2023, claiming to have become the industry’s first company developing NAND flash memory with over 300 layers, with plans for mass production by 2025. Micron has also started to mass produce its 232-layer QLC NANDs in 2024.

Uncertainties behind Kioxia’s Optimism

However, to Kioxia, there are more challenges to overcome, as technological obstacles and Western Digital’s stance add uncertainties to its ambition. According to the report from Blocks & Files, increasing density in a 3D NAND die involves more than just adding layers, as each layer’s edge must be exposed for memory cell electrical connectivity. This results in a staircase-like profile, and as the number of layers grows, the die area needed for the staircase expands as well.

Therefore, to increase density, it is necessary to shrink the cell size both vertically and laterally, and to raise the bit level as well. All these scaling factors, including layer counts, vertical cell size reduction, lateral cell size reduction, and cell bit level increases, present their own technological challenges.

Moreover, according to Blocks & Files, WD has concerns regarding the manufacturing capital costs and the return on investment from selling chips and SSDs made with the fabricated NAND dies.

Citing Western Digital EVP Robert Soderbery in June, the report noted that in the 3D era, NAND manufacturing requires higher capital intensity but offers a lower cost reduction as bit density increases. The company even described the situation as the “end of the layers race,” indicating that there would be a slowdown in the rate of NAND layer count increases to optimize capital deployment.

How long would the battle of layers continue, and how far would it go? Technological breakthroughs as well as the willingness to endure higher capital intensity while the cost reduction being relatively limited may be key.

Read more

• [News] NAND Flash Market Competition Intensifies, as SK Hynix, Samsung Strive to Meet AI Demand
• [News] With Memory Market Recovering, Kioxia Has Reportedly Ceased Production Cuts and Secured Bank Lending

(Photo credit: Kioxia)