[News] Kioxia to Unveil new DRAM, SCM, and NAND Technologies in December

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Kioxia is set to introduce its progress on DRAM storage-class memory (SCM) and 3D-NAND technologies at the IEEE International Electron Devices Meeting (IEDM) 2024 conference in San Francisco in December, featuring its Oxide-Semiconductor Channel Transistor DRAM (OCTRAM) technology jointly developed with Taiwan memory chipmaker Nanya Technology, as well as MRAM-based storage-class memory jointly developed with SK hynix, according to a report from Block and Files.

Kioxia will reportedly present a new type of DRAM with oxide semiconductors that reduce power consumption, MRAM suitable for larger capacities for SCM applications, and a new 3D NAND structure with superior bit density and performance.

According to the report, Kioxia has developed the DRAM with oxide semiconductors with Nanya Technology. This Oxide-Semiconductor Channel Transistor DRAM (OCTRAM) features a gate-all-round InGaZnO (Indium Gallium Zinc Oxide) vertical transistor with the oxide that can reduce current leakage to an “extremely low” level. According to Kioxia’s press release, the technology has the potential to reduce power consumption across various applications, such as AI, post-5G communication systems, and IoT devices.

The MRAM-based storage-class memory is developed with SK hynix. According to Kioxia’s press release, the companies have achieved cell read/write operation at the smallest-ever scale of cell half-pitch of 20.5 nanometers for MRAM. The press release pointed out that memory reliability tends to degrade as cells are miniaturized. The companies develop a new read/write method that can reduce the unwanted capacitance that occurs in the readout circuits.  According to Kioxia’s press release, this technology has practical applications for AI and big data processing.

Last, Kioxia developed a new 3D NAND structure, aiming to enhance reliability and prevent the performance degradation of NAND-type cell. In conventional structures, degradation of performance typically occurs when the number of stacked layers increases. Compared to the conventional structure that stacks NAND-type cells vertically, the new structure arranges NAND-type cells horizontally. The press release indicated that this new structure makes it possible to develop 3D flash memory with high bit density and reliability at low cost.

(Photo credit: Kioxia)