[News] These Advanced 12-Inch Wafer Fabs Enter a New Stage

---

---

TSMC: Steady Progress in Advanced Nodes, Reduced Revenue Share from Mature Nodes

 

On November 26, TSMC held an equipment installation ceremony for its new 2nm fab in Kaohsiung, marking the company’s first 12-inch wafer fab in Kaohsiung, Taiwan. This milestone signals TSMC’s transition from construction to production.

The Kaohsiung 2nm fab is preparing for mass production in 2025. Once operational, it will work alongside the Hsinchu Baoshan 2nm fab to produce the world’s most advanced chips. Industry experts expect major customers such as Apple and AMD to be among its first clients.

In the U.S., TSMC’s Arizona Fab 1 completed its first trial production in September, producing initial N4 4nm wafers. Meanwhile, the second Arizona fab, set to use the 3nm process, is expected to achieve a monthly capacity of 25,000 wafers.

By 2028, the combined monthly capacity of these two fabs is projected to reach 60,000 wafers. A third fab is planned to utilize the 2nm or more advanced processes, targeted for completion by 2030.

TSMC confirmed that the development of advanced processes is progressing according to its roadmap, with no major changes expected in the coming years.

Samsung: Advancing Yield Rates in Cutting-Edge Processes, Continuous Upgrades to New Nodes
Samsung’s 3nm technology introduced GAA (Gate-All-Around) transistors for the first time, aiming to enhance chip performance and energy efficiency. The 3nm process comes in two versions: the first-generation 3GAE and the second-generation 3GAP.

Industry sources report that the yield rate for the initial 3GAE process is only 50-60%, insufficient for large-scale production. The 3GAP process has an even lower yield rate of 20%, but efforts are underway to improve it rapidly.

Most of Samsung’s advanced technology development is concentrated in South Korea and the U.S. In Korea, the Giheung S1 lines mainly produce low-power chips from 65nm to 8nm, while the Hwaseong S3 lines focus on products from 10nm to 2nm.

Reports indicate that the Hwaseong facility is currently installing equipment for a 2nm production line, with a monthly capacity of 7,000 wafers expected by the end of Q1 2025.

Industry insiders revealed that Samsung plans to install a 1.4nm production line at its Pyeongtaek Plant 2 (S5) with a monthly capacity of approximately 2,000–3,000 wafers. However, the equipment installation at Samsung’s Taylor, Texas fab, originally scheduled for this year, has reportedly been postponed to 2026 or later due to yield-related challenges.

In mid-2024, Samsung announced a new process technology roadmap, introducing two new nodes—SF2Z and SF4U—alongside comprehensive “one-stop” AI solutions for its foundry customers.

Intel: Can the Semiconductor Giant Reverse Its Fortunes by Year-End?
On November 26, Intel announced an agreement with the U.S. Department of Commerce to receive up to USD 7.86 billion in direct funding for 12-inch wafer fabs and advanced packaging projects in Arizona, New Mexico, Ohio, and Oregon.

Additionally, Bloomberg recently reported that Apollo Global Management (APO), a U.S.-based investment firm, plans to invest up to USD 5 billion in Intel.

Earlier this year, in June, Intel secured USD 11 billion in financing by divesting a 49% equity stake in its Fab 34 joint venture, led by APO.

Intel is also adopting cost-cutting measures, including delaying or reducing factory investment projects, to navigate its current financial challenges while advancing its U.S. fab expansion plans.

In terms of process development, Intel’s roadmap shows significant progress. The company has completed transitions to Intel 7 (10nm) and Intel 4 (7nm). In June, Intel announced that its Intel 3 process had entered mass production as planned.

(Photo credit: Intel)