According to a report by Liberty Times, industry sources indicate that TSMC’s 2nm trial production yield has exceeded 60%, surpassing expectations. The company is set to begin mass production as scheduled next year, and at that point, it will represent the most advanced node in the world.
The report highlights that the news on TSMC’s progress, shared on social media, has prompted a personal response from former Intel CEO Pat Gelsinger. Gelsinger criticized the use of percentages as a metric for evaluating “semiconductor health,” asserting that relying on such metrics demonstrates a lack of understanding of chip yields, as the report indicates.
speaking about yield as a % isn’t appropriate. large die will have lower yield, smaller die – high yield percentage. Anyone using % yield as a metric for semiconductor health without defining die size, doesn’t understand semiconductor yield. yields are represented as defect…
— Pat Gelsinger (@PGelsinger) December 7, 2024
TSMC’s 2nm Process: A Leap in Semiconductor Technology
According to TSMC, the company’s 2nm (N2) technology features its first generation of nanosheet transistor technology with full-node strides in performance and power consumption. This technology is more advanced and complex compared to the current 3nm FinFET process, as the Liberty Times report notes.
The report notes that TSMC is currently conducting trial production at its facility in Baoshan Plant in Hsinchu, northern Taiwan. According to the report, once the yield reaches mass production levels, the company plans to replicate the process for large-scale production at its facility in Kaohsiung.
Although TSMC has not disclosed specific trial production yield numbers, it emphasizes that its 2nm process is progressing smoothly, as the report notes.
TSMC has previously stated that it produces 99% of AI-related chips globally. Additionally, the company noted that while demand for its 3nm process remains strong, its 2nm process is even more appealing to AI-focused customers, as emphasized in the report.
Intel’s 18A Process: Challenges and Gelsinger’s Defense
Although TSMC is making significant strides with its 2nm process, Intel has faced its own challenges in advancing its semiconductor technology. According to a report from Wccftech, Intel’s 18A process, once touted as a significant breakthrough, has been rumored to have yield rates below 10%. However, former Intel CEO Pat Gelsinger has publicly refuted these claims, asserting that the rumors are false, as the report from Wccftech notes.
Gelsinger argues that evaluating a process solely based on yield rate is flawed, explaining that “a large die will have a lower yield, smaller die – high yield percentage,” as highlighted in the Wccftech report.
The Wccftech report further highlights that, despite his recent departure as Intel CEO, Gelsinger has remained actively engaged in addressing these assertions. He expressed pride in the progress made by the “18A team” and suggested that the reality is far more positive than what has been portrayed in the media.
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(Photo credit: TSMC)