According to a report from Business Korea, Samsung Electronics has started the construction of a test line to enhance the yield of its 7th generation DRAM at the 10nm level.
The report notes that as Samsung has been losing its leadership in the DRAM sector, including HBM, this move might be an attempt to regain its competitiveness.
Citing industry sources on December 17, the report points out that Samsung has begun constructing the 10nm-level 7th generation DRAM test line at its Pyeongtaek Plant 2 (P2) during the fourth quarter of 2024. The test line is referred to as a “one path” line and is expected to be completed by the first quarter of 2025.
Although the exact scale of the 10nm-level 7th generation DRAM facility in Pyeongtaek is not confirmed, test lines are typically installed to process around 10,000 wafers per month, as indicated by the report.
In March, Samsung announced at MemCon 2024 in the U.S. that it plans to begin mass production of the 7th generation DRAM by 2026. As for its predecessor, the 6th generation (1c) DRAM, mass production is planned for 2025.
Samsung plans to introduce chip-making equipment to its Pyeongtaek Plant 4 (P4) starting in early 2025 to produce 10nm-class 6th generation DRAM, as highlighted by the report. The company is actively working to improve yield rates, aiming to secure internal mass production approval (PRA) for the 6th generation DRAM by May 2025.
Notably, Samsung is establishing the 7th generation DRAM test line at the same time as it is still preparing for mass production of the 6th generation. The report points out that this simultaneous development suggests an aggressive investment strategy, as Samsung aims to secure a competitive edge and regain market dominance by 2025.
This year, Samsung has lost its leadership in the HBM market to SK hynix, which has gained significant attention for its role in AI memory. Samsung is also lagging in the development of 10nm-class 6th generation memory, as noted by the report.
To reclaim its leadership next year, Samsung is intensifying its investment in NAND flash alongside its ongoing DRAM initiatives, according to the report. The company is currently setting up the industry’s first 400-layer NAND (V10) test line at Pyeongtaek Plant 1 and installing 286-layer (V9) equipment at its NAND fab in Pyeongtaek Plant 4.
Read more
(Photo credit: Samsung)