In TSMC’s earnings call last month, the foundry giant revealed that 3nm already accounted for 26% of its total revenue in the fourth quarter of 2024. Now it is likely to get a major boost on the node, as an etnews report suggests that Apple began mass production of the M5 chip in January, leveraging TSMC’s N3P.
While the front-end process leverages TSMC’s N3P process, the packaging of Apple’s M5 chip is handled by Taiwan’s ASE, U.S.-based Amkor, and China’s JCET, as noted by etnews. On the other hand, substrate manufacturing is handled by Taiwan’s Unimicron and Samsung Electro-Mechanics, the report adds.
As highlighted by a previous report from Commercial Times, compared to TSMC’s N3E featured in 2024, N3P reduces the number of EUV layers and avoids dual patterning, trading slight transistor density for significantly improved yield rates and lower production costs.
According to TSMC, N3P offers an additional boost to N3E with 5% more speed at the same leakage, 5-10% power reduction at the same speed, and 1.04X more chip density.
According to etnews, M5 will power key products like Macs and iPads, with the next iPad Pro likely among the first to feature it. Notably, major OSAT companies are reportedly investing in additional facilities for the mass production of the higher-end M5 variants, including Pro, Max, and Ultra models.
For the M5 Pro models, the etnews report indicates that TSMC’s SoIC-MH (System-on-Integrated-Chips-Molding-Horizontal) packaging process has been applied, which is expected to further improve heat management and performance.
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(Photo credit: Apple)