[News] Samsung Reportedly Targets 1,000-Layer NAND by 2030, Rolls Out Wafer Bonding at 400 Layers

As the NAND race heats up, Samsung has revealed its roadmap, aiming to develop 1,000-layer NAND by 2030, according to the bell. To achieve the goal, the memory giant plans to introduce a “multi-BV” NAND structure, stacking four wafers to break structural limits, the report suggests.

Citing Song Jae-hyuk, CTO of Samsung Electronics’ DS division, the report notes that by using wafer bonding technology, the company can implement more than 1,000 layers in NAND.

Wafer bonding involves separately manufacturing peripheral wafers and cell wafers, then bonding them together to form a single semiconductor. According to the bell, the technology is expected to be applied starting from Samsung’s V10 (10th generation) NAND.

According to ZDNet, Samsung previously used the COP (Cell on Peripheral) method on NAND production, where the peripheral circuit was placed on one wafer and cells were stacked on top.

However, as layer counts rise, pressure on the lower peripheral impacts reliability. As per the bell, the industry estimates that a single wafer can accommodate around 500 NAND layers when only cell structures are implemented.

Collaboration with China’s YMTC Helps

The move aligns with Samsung’s decision to team up with China’s YMTC. It is reportedly set to use a hybrid bonding patent from YMTC, starting with its V10 NAND, according to ZDNet. The report also indicates that Samsung aims to begin mass production of V10 NAND by the second half of 2025, with around 420 to 430 layers.

Samsung is also incorporating various key technologies in future NAND production, including wafer bonding, cryogenic etching, and the use of molybdenum, according to the bell. These technologies will reportedly be applied starting with 400-layer NAND.

Kioxia Eyes 1000-layer NAND by 2027

Notably, Samsung is not the only company researching this structure. Kioxia is also developing a similar approach under the name “multi-stack CBA” (CMOS directly Bonded to Array), as per the bell.

The Japanese NAND giant is even more ambitious with its NAND roadmap, as it aims to develop 1,000-layer 3D NAND by 2027, according to a previous report from Blocks and Files.

Read more

• [News] SK hynix Set to Finalize Intel’s NAND Acquisition in March, Boosting eSSD Market Position
• [News] Samsung Rumored to Adopt Hybrid Bonding Patent from China’s YMTC for 400+ Layer NAND

(Photo credit: Samsung)