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With 2nm scheduled to enter mass production in 2H25, TSMC, at its North America Technology Symposium today, introduced more details on its next-gen advanced node, A14, which is expected to start production in 2028. Notably, Tom’s Hardware suggests that the initial version will lack backside power delivery (BSPDN), with an upgraded version incorporating BSPDN planned for 2029.
TSMC notes that the current A14 development is progressing smoothly with yield performance ahead of schedule. As highlighted by Tom’s Hardware, A14 will harness 2nd Gen gate-all-around (GAA) nanosheet transistors, enhanced by its NanoFlex Pro technology, which enables greater performance, power efficiency and design flexibility.
According to its press release, compared with the N2 process, A14 will offer up to 15% speed improvement at the same power, or up to 30% power reduction at the same speed, along with more than 20% increase in logic density.
Citing Kevin Zhang, Senior Vice President and deputy COO at TSMC, Tom’s Hardware explains that unlike A16, A14 (like N2 and N2P) omits the Super Power Rail (SPR) BSPDN. Instead, it targets applications where the added cost of BSPDN offers no significant benefit, enabling client, edge, and specialty applications to take advantage of its features, the report adds.
More A14 Variations on the Way
However, an updated version of A14 with BSPDN will likely debut in 2029, according to Tom’s Hardware. Though TSMC hasn’t revealed the official name of the process yet, the report suggests that the updated version is likely to be dubbed A14P, in line with TSMC’s usual naming convention.
Looking ahead, the report indicates that versions like A14’s high-performance variant (A14X) and its cost-effective version (A14C) are expected to roll out sometime after 2029.
Large Size CoWoS, SOW-X and More
Meanwhile, TSMC is also advancing its Chip on Wafer on Substrate (CoWoS) technology to meet AI’s growing demand for logic and HBM. The foundry giant announced that by 2027, it aims to mass-produce 9.5 reticle size CoWoS, enabling packages with 12 or more HBM stacks alongside cutting-edge logic technology.
Following the System-on-Wafer (TSMC-SoW) in 2024, TSMC also introduced SoW-X, a CoWoS-based solution delivering 40X the computing power of current CoWoS, with volume production set for 2027.
It is also worth noting that TSMC gears up for the HBM4 era, as it introduced solutions like the silicon photonics integration with TSMC’s Compact Universal Photonic Engine (COUPE), N12 and N3 logic base die for HBM4.
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(Photo credit: TSMC)
