Driven by booming demand for AI chips, TSMC’s advanced CoWoS (Chip on Wafer on Substrate) packaging faces a significant supply shortage. In response, TSMC is expanding its production capacity and is considering price increases to maintain supply chain stability.
According to a recent report from Morgan Stanley cited by Commercial Times, TSMC has received approval from NVIDIA to raise prices next year, with CoWoS packaging expected to increase by 10% to 20%, depending on capacity expansion.
At TSMC’s Q3 earnings call, Chairman C.C. Wei highlighted that customer demand for CoWoS far outstrips supply. Despite TSMC’s plan to more than double CoWoS capacity in 2024 compared to 2023, supply constraints persist.
To meet demand, TSMC is collaborating closely with packaging and testing firms to expand CoWoS capacity. Industry sources quoted by CNA reveal that ASE Group and SPIL are working with TSMC on the back-end CoWoS-S oS (on-Substrate) process. By 2025, ASE may handle 40-50% of TSMC’s outsourced CoWoS-S oS packaging.
ASE announced investments in advanced packaging, covering CoWoS front-end (Chip on Wafer) and oS processes, along with advanced testing.
SPIL, a subsidiary of ASE, recently invested NT$419 million in land at Central Taiwan Science Park’s Erlin Park, boosting CoWoS capacity. Additionally, SPIL has allocated NT$3.702 billion to acquire property from Ming Hwei Energy in Douliu, Yunlin, for further expansion.
ASE also announced in early October that its new Kaohsiung K28 facility, slated for completion in 2026, will expand CoWoS capacity.
In early October, TSMC announced a partnership with Amkor in Arizona to expand InFO and CoWoS packaging capabilities. Industry sources cited by CNA suggest that Apple, a user of TSMC’s U.S.-based 4nm process for application processors, may leverage Amkor’s CoWoS capacity. Other U.S.-based AI clients utilizing TSMC’s advanced nodes for ASICs and GPUs are also expected to consider Amkor’s CoWoS packaging in the future.
(Photo credit: TSMC)