[News] Japanese Lawmaker Confirms Additional ¥900 Billion Subsidies for TSMC’s Kumamoto 2nd Fab

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According to a report by Bloomberg, Yoshihiro Seki, Secretary-General of the ruling Liberal Democratic Party and a member of the Japanese parliament, has announced that the government is planning to allocate an additional ¥900 billion for the construction of TSMC’s Fab 2 in Kumamoto, Japan. Furthermore, an extra ¥590 billion in subsidies will be provided to support the construction of a wafer fab by the Japanese semiconductor startup Rapidus.

Seki emphasized that subsidies usually cover about one-third of the total investment. With measures like training Japanese engineers and collaborative R&D with local companies, this subsidy could increase to potentially cover up to half of the investment. He also noted that the specific amount remains subject to change as the additional budget has not been finalized yet.

The Japanese government initiated the “Strategy for Semiconductors and the Digital Industry” in 2021 to address economic risks and prepare for the wave of digitalization. At that time, they already provided ¥476 billion in subsidies for TSMC’s Kumamoto 1st Fab. The current subsidy marks an expansion of these efforts.

The local government Kumamoto is eagerly anticipating TSMC’s presence. Ikuo Kabashima, the Governor of Kumamoto Prefecture, recently proposed “New Airport Concept Next Stage” that envisions using the airport as a hub for semiconductor imports and exports over the next decade. This plan aims to stimulate the clustering of semiconductor-related industries and contribute to regional development centered around Kumamoto.

Moreover, the Japanese government has pledged to provide ¥330 billion in funding to enable Rapidus to construct a 2nm wafer fab in Hokkaido. These substantial subsidies underscore the Japanese government’s commitment to these semiconductor projects.

In response to the Japanese government’s additional subsidies, Tetsuro Higashi, Chairman of Rapidus, stated in an interview with Jiji Press on the 24th that apart from the new factory being built in Chitose, Hokkaido, “We also plan to construct second and third factories, and they will also be situated in Chitose, Hokkaido.” Rapidus’s 2nm chip R&D/production facility, Chitose Fab IIM-1, located in the Chitose Meimeimei World industrial park in Chitose, Hokkaido, commenced construction in September. The trial production line is expected to start in April 2025, with mass production slated to begin in 2027.