TSMC, the leading semiconductor foundry, recently announced plans to establish a 2nm production line in the US, while attention remains on expansion progress in Taiwan.
According to a report from MoneyDJ, it has indicated that the 2nm fab in Hsinchu’s Baoshan is proceeding steadily as planned, and the 2nm fab in Kaohsiung is gaining momentum, with the first tool-in expected by year-end.
Initially, both fabs will achieve a monthly capacity of approximately 30,000 to 35,000 wafers. By 2027, their combined capacity is set to exceed 100,000 wafers, marking the mainstream transition to the next generation of processes.
As per industry sources cited by MoneyDJ, TSMC’s 2nm production bases are located in Hsinchu Science Park and Kaohsiung, and Baoshan’s Phase 2 will begin tool-in in the second quarter, with a “mini line” to be established by year-end and mass production targeted for Q4 2025, starting with an initial monthly capacity of approximately 30,000 to 35,000 wafers.
Meanwhile, the Kaohsiung plant is expected to commence equipment installation by year-end, ahead of the original schedule, aiming for mass production in the first half of 2026 with an initial monthly capacity plan similar to Baoshan’s 30,000 to 35,000 wafers.
The same sources also indicate that after the formal mass production of the Baoshan and Kaohsiung plants, they will enter the capacity ramp-up phase, aiming to achieve a combined capacity of around 110,000 to 120,000 wafers per month by 2027. Both fabs will produce the first-generation 2nm and the second-generation N2P with backside power rail technology. The next-generation 1.4nm (A14) is expected to commence production in the second half of 2027, potentially located in Taichung.
In the 2nm client landscape, Apple remains a frontrunner, earmarking the technology for flagship smartphones. Intel has also expressed interest, with AMD, NVIDIA, and MediaTek expected to follow suit.
Looking at the process roadmap, this year’s iPhone 16 will use N3E, while next year’s model will adopt N3P. Thus, the first consumer product leveraging TSMC’s 2nm process is anticipated to launch in 2026.
Previously at its earnings call, TSMC disclosed the development of a backside power rail solution for N2, tailored for HPC applications.
TSMC is scheduled to hold an earnings call on April 18th. It is anticipated that the related topics around its 2nm process will also be the focus of attention on the day of the conference.
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(Photo credit: TSMC)