News
According to a report from Nikkei, Japanese memory manufacturer Kioxia has ended production cuts amidst a recovery in the memory market and has secured new bank credit support. The company’s plants in Yokkaichi, Mie Prefecture, and Kitakami, Iwate Prefecture, have restored their production lines to 100% capacity, focusing mainly on NAND flash production.
With improved business conditions, creditor banks have reportedly agreed to refinance a maturing loan of JPY 540 billion (roughly USD 3.43 billion) and have established a new credit line totaling JPY 210 billion (roughly USD 1.33 billion).
Kioxia had previously implemented production cuts in October 2022 due to sluggish demand for smartphone products, reducing output by over 30%. The planned launch of new production lines at the Kitakami plant, originally scheduled for 2023, has been postponed to 2025.
The improved market environment is reflected in Kioxia’s financial report for January to March 2024, where the company achieved a net profit of JPY 10.3 billion, ending six consecutive quarters of losses. Demand for smartphone and personal computer chips has bottomed out and is starting to recover, while orders related to data centers have increased.
As per a previous TrendForce report, Kioxia’s Q1 output was still affected by production cuts from the previous quarter, resulting in a modest 7% QoQ increase in shipments. However, rising NAND Flash prices led to a 26.3% QoQ rise in revenue to $1.82 billion. Kioxia expects to grow Q2 revenue by approximately 20%, supported by increased supply bits and more flexible pricing, which will further expand enterprise SSD shipments.
Per the same report from Nikkei, led by a banking consortium including Sumitomo Mitsui Banking, Mitsubishi UFJ Financial Group, and Mizuho Bank, Kioxia’s improved performance has led to relaxed loan terms and agreement on refinancing along with new credit limits. Additionally, the banks will assist in funding for equipment upgrades.
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(Photo credit: Kioxia)
Press Releases
In 2023, Samsung disclosed plans to launch its advanced three-dimensional (3D) chip packaging technology, which would be able to integrate memory and processors needed for high-performance chips, in much smaller sizes. Now, at the Samsung Foundry Forum in San Jose taken place in June, the tech giant made it public that it would introduce 3D packaging services for HBM within this year, according to the latest report by The Korea Economic Daily.
For now, HBM chips are predominantly packaged with 2.5D technology. Citing industry sources as well as personnel from Samsung, the company’s 3D chip packaging technology is expected to hit the market for HBM4, the sixth generation of the HBM family.
Samsung’s announcement regarding its 3D HBM packaing roadmap has been made after NVIDIA CEO Jensen Huang revealed Rubin at COMPUTEX 2024, the company’s upcoming architecture of its AI platform after Blackwell. The Rubin GPU will reportedly feature 8 HBM4, while the Rubin Ultra GPU will come with 12 HBM4 chips, targeting to be released in 2026.
Currently, Samsung’s SAINT (Samsung Advanced Interconnect Technology) platform includes three types of 3D stacking technologies: SAINT S, SAINT L, and SAINT D.
SAINT S involves vertically stacking SRAM on logic chips such as CPUs, while SAINT L involves stacking logic chips on top of other logic chips or application processors (APs). SAINT D, on the other hand, entails vertical stacking of DRAM with logic chips like CPUs and GPUs.
The Korea Economic Daily noted that unlike 2.5D technology, under which HBM chips are horizontally connected with a GPU on a silicon interposer, by stacking HBM chips vertically on top of a GPU, 3D packaging could further accelerate data learning and inference processing, and thus does not require a silicon interposer, a thin substrate that sits between chips to allow them to communicate and work together.
It is also understood that Samsung plans to offer 3D HBM packaging on a turnkey basis, according to the Korea Economic Daily. To achieve this, its advanced packaging team will vertically interconnect HBM chips produced by its memory business division, with GPUs assembled for fabless companies by its foundry unit, the report noted.
Regarding Samsung’s long-time rival, TSMC, the company’s Chip on Wafer on Substrate (CoWoS) has been a key enabler for the AI revolution by allowing customers to pack more processor cores and HBM stacks side by side on one interposer. TSMC also made similar announcement in May, reportedly utilizing 12nm and 5nm process nodes in manufacturing HBM4, according to a report by AnandTech.
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(Photo credit: Samsung)
News
Earlier, a report from a Japanese media outlet The Daily Industrial News indicated that memory giant Micron planned to build a new DRAM plant in Hiroshima, with construction scheduled to begin in early 2026 and aiming for completion of plant buildings and first tool-in by the end of 2027.
According to industry sources cited by TechNews, Micron is expected to invest between JPY 600 to 800 billion in the new facility, located adjacent to the existing Fab15 facility. Initially, the new plant will focus on DRAM production, excluding backend packaging and testing, with a capacity emphasis on HBM products.
Micron’s new Hiroshima plant will be the first to adopt Extreme Ultraviolet (EUV) lithography equipment, producing new advanced 1-Gamma process DRAM developed in collaboration between Taiwan and Japan. Subsequently, it will also transition to the 1-Delta process, leading to a significant increase in EUV tool-ins and heightened cleanroom facilities.
As for Fab 15 in Hiroshima, it serves as a mass production site for HBM, handling front-end wafer production and Through-Silicon Via (TSV) processes, while back-end stacking and testing processes are managed by the Taichung back-end plant in Taiwan. Market reports cited by TechNews also suggest that due to expanding demand for HBM, Micron’s facilities in Taiwan will commence HBM production and TSV processes starting next year.
TrendForce points out that due to robust growth in the HBM market, lower production yields, larger chip sizes, and other factors, producing the same bit output in HBM requires approximately three times the wafer input compared to DDR5, potentially squeezing traditional DRAM capacity.
Given Micron’s need to accelerate its penetration into the HBM market, and with its 2025 production capacity already fully booked by customers, the construction of a new plant becomes imperative. Micron also plans to maintain its HBM product line market share at 20% to 25% by 2025, eyeing on increasing it to match traditional DRAM levels.
The new Hiroshima plant has also received subsidies from the Japanese government. In October last year, Japan’s Ministry of Economy, Trade and Industry announced subsidies totaling JPY 192 billion for Micron’s construction and equipment expenses. Additionally, subsidies of up to JPY 8.87 billion for production costs and JPY 25 billion for research and development costs were provided.
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(Photo credit: Micron)
News
SK hynix, as the market leader in HBM, targets to begin mass production of its GDDR7 chips in the fourth quarter of 2024, the company said on 13th June.
In the meantime, Micron also announced the launch of its GDDR7 graphics memory at Computex, which is currently being sampled. According to AnandTech, Micron not only plans to start mass production for GDDR7 this year, but also aims to do so early enough for some customers to ship finished products by year-end, with major applications range from AI and gaming to high-performance computing.
Samsung, on the other hand, is the first among the Big Three to present its GDDR7 products. According to its press release, Samsung has completed development of the industry’s first GDDR7 DRAM in July, 2023, a 16-gigabit product, after its development of the industry’s first 24Gbps GDDR6 DRAM in 2022. According to AnandTech, Samsung is already sampling GDDR7 memory with the aim of launching it in 2024.
According to a report from AnandTech, SK hynix already has sample chips available for partners to test. Currently, the company plans to produce both 16Gbit and 24Gbit chips, with data transfer rates of up to 40 GT/s. As Samsung and Micron both expect to begin with 16Gbit chips running at 32 GT/s for their GDDR7 products, whether SK hynix could win customers’ favor by its faster speed attracts attention, AnandTech noted.
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(Photo credit: SK hynix)
Insights
According to TrendForce’s latest memory spot price trend report, China’s 618 shopping festival has limited effects on demand, slowing down the digestion of existing inventory, causing DRAM and NAND Flash spot prices to slide further. However, DDR5 has been performing relatively better than older products such as DDR3 and DDR4 in sales. Details are as follows:
DRAM Spot Price:
Spot prices continue to decline. China’s 618 shopping festival is generating a more significant extent of purchase sentiment regarding smartphones due to huge price slashes, while other end products, having yet to exhibit any signs of recovery in demand, have slowed down the digestion of existing inventory. Generally speaking, DDR5 has been performing slightly better in sales, while older products, such as DDR3/4, are sustaining a larger decrement due to transitions of platforms. Mainstream packaged DDR4 1Gx8 2666MT/s saw a price drop of 0.84% (from US$1.904 to US$1.888) this week.
NAND Flash Spot Price:
Spot prices for NAND Flash are maintaining a slow depletion. The recent 618 e-commerce promotions have proven to be confined in efficacy towards overall market demand, where the enervation seen from transactions of consumer products continues to aggravate the inversion between contract and spot prices. 512Gb TLC wafer spots have dropped by 1.74% this week, arriving at US$3.328.