Memory giants Samsung, SK Hynix, and Micron are all actively investing in high-bandwidth memory (HBM) production. Industry sources cited in a report from Commercial Times indicate that due to capacity crowding effects, DRAM products may face shortages in the second half of the year.

According to TrendForce, the three largest DRAM suppliers are increasing wafer input for advanced processes. Following a rise in memory contract prices, companies have boosted their capital investments, with capacity expansion focusing on the second half of this year. It is expected that wafer input for 1alpha nm and above processes will account for approximately 40% of total DRAM wafer input by the end of the year.

HBM production will be prioritized due to its profitability and increasing demand. Regarding the latest developments in HBM, TrendForce indicates that HBM3e will become the market mainstream this year, with shipments concentrated in the second half of the year.

Currently, SK Hynix remains the primary supplier, along with Micron, both utilizing 1beta nm processes and already shipping to NVIDIA. Samsung, using a 1alpha nm process, is expected to complete qualification in the second quarter and begin deliveries mid-year.

The growing content per unit in PCs, servers, and smartphones is driving up the consumption of advanced process capacity each quarter. Servers, in particular, are seeing the highest capacity increase—primarily driven by AI servers with content of 1.75 TB per unit. With the mass production of new platforms like Intel’s Sapphire Rapids and AMD’s Genoa, which require DDR5 memory, DDR5 penetration is expected to exceed 50% by the end of the year.

As HBM3e shipments are expected to be concentrated in the second half of the year—coinciding with the peak season for memory demand—market demand for DDR5 and LPDDR5(X) is also expected to increase. With a higher proportion of wafer input allocated to HBM production, the output of advanced processes will be limited. Consequently, capacity allocation in the second half of the year will be crucial in determining whether supply can meet demand.

Samsung expects existing facilities to be fully utilized by the end of 2024. The new P4L plant is slated for completion in 2025, and the Line 15 facility will undergo a process transition from 1Y nm to 1beta nm and above.

The capacity of SK Hynix’s M16 plant is expected to expand next year, while the M15X plant is also planned for completion in 2025, with mass production starting at the end of next year.

Micron’s facility in Taiwan will return to full capacity next year, with future expansions focused on the US. The Boise facility is expected to be completed in 2025, with equipment installations following and mass production planned for 2026.

With the expected volume production of NVIDIA’s GB200 in 2025, featuring HBM3e with 192/384GB specifications, HBM output is anticipated to nearly double. Each major manufacturer will invest in HBM4 development, prioritizing HBM in their capacity planning. Consequently, due to capacity crowding effects, there may be shortages in DRAM supply.

Read more

• HBM3e Production Surge Expected to Make Up 35% of Advanced Process Wafer Input by End of 2024, Says TrendForce
• [News] DRAM Price Surge Halts, Could HBM Demand Drive Price Increases?

(Photo credit: Samsung)

As AI-related semiconductors has been driving the demand of High Bandwidth Memory (HBM), the NAND flash market now also feels the vibe. According to industry sources cited by Business Korea, the NAND Flash market competition is intensifying, while memory giants Samsung and SK Hynix are ramping up their efforts to improve the performance and capacity of NAND products.

In April, Samsung confirmed that it has begun mass production for its one-terabit (Tb) triple-level cell (TLC) 9th-generation vertical NAND (V-NAND), boasted to improve the bit density by about 50% compared to the 8th-generation V-NAND, with the number of layers reaching 290, according an earlier report by The Korea Economic Daily.

Based on the report on May 20 by Business Korea, Samsung intends to dominate the AI SSD market with its 9th Generation V-NAND, targeting the development and sampling of ultra-high capacity 64 terabyte (TB) SSDs in the second quarter.

In mid-May, Samsung even revealed the target to release advanced NAND Flash with over 1000 layers by 2030. According to an earlier report by Wccftech, the South Korean memory giant plans to apply new ferroelectric materials on the manufacturing of NAND.

On the other hand, the current HBM3 supply for NVIDIA’s H100 solution is primarily met by SK Hynix, leading to a supply shortfall in meeting burgeoning AI market demands. After establishing its leadership in HBM, it is reported that SK Hynix now aims to dominate the AI memory market in NAND as well, according to Business Korea.

It is worth noting that SK Hynix recently achieved a breakthrough with the development of “Zoned UFS 4.0” (ZUFS 4.0), an on-device AI mobile NAND solution tailored for AI-capable smartphones, which is scheduled to start mass production in the third quarter, according to TheElec.

(Photo credit: Samsung)

The recovery in demand for PCs and smartphones will take time, leading to a halt in the upward trend of DRAM prices, remaining stable for two consecutive months. However, the rapid growth in demand for High Bandwidth Memory (HBM), essential for data center servers and generative AI, is expected to boost future DRAM prices as the production trend of HBM rises.

The Nikkei News reported on May 18th that the recovery in demand for PCs and smartphones will take time, leading to a halt in the upward trend of DRAM prices used in smartphones, PCs, and data center servers for temporary data storage.

In April 2024, the wholesale price (bulk transaction price) of the benchmark product DDR4 8Gb was around USD 1.95 per unit, and the price of the smaller capacity 4Gb product was around USD 1.50 per unit, both remaining unchanged from the previous month (March 2024) and marking the second consecutive month of stability.

As of February 2024, DRAM prices had risen for four consecutive months. DRAM wholesale prices are negotiated between memory manufacturers and customers monthly or quarterly. Reportedly, approximately 50% of DRAM demand comes from PCs and servers, while around 35% comes from smartphones.

The report indicated that the demand for HBM, essential for generative AI, is rapidly increasing, and market expectations for the production trend of HBM are expected to boost future DRAM price increases.

A source cited in the report, which is an Electronic product trader, noted that some major manufacturers have accepted the memory manufacturers’ price hike requests. A PC manufacturer source cited by the report also stated that DRAM wholesale prices from April to June are expected to rise by 5-10% compared to January to March.

Another source cited by the report stated that the facilities required to produce HBM are approximately three times larger than those needed for producing general DRAM. If HBM production increases, the production volume of other DRAMs will decrease, thereby driving up prices. Another source cited in the report stated that supply cannot keep up with demand, and pricing power is currently in the hands of memory manufacturers.

Read more

• [News] Samsung and SK Hynix Urgently Reallocate 20% of DRAM Production Capacity to Support Rising HBM demand
• [News] Three-way Contest for HBM Dominance, Uncertainties Surrounding China’s Supply Chain Involvement

(Photo credit: SK Hynix)

According to sources and documents cited in a report from Reuters, two major Chinese chip manufacturers are in the early stages of producing High Bandwidth Memory (HBM) semiconductors, primarily for AI chipsets. Despite facing export restrictions from the United States, China is currently making progress mainly on older versions of HBM, gradually reducing reliance on other global suppliers.

Sources cited in the same report revealed that China’s largest DRAM chip manufacturer, ChangXin Memory Technologies (CXMT), is collaborating with chip packaging and testing company Tongfu Microelectronics to develop HBM chip samples, which are being showcased to potential customers.

On the other hand, Wuhan Xinxin Semiconductor Manufacturing Co., Ltd. (XMC) is constructing a 12-inch plant with a monthly capacity of 3,000 wafers, which is planned to  manufucture HBM chips. Per the corporate registration documents, the plant is expected to commence operations in February this year.

Sources in the report mentioned that CXMT and other Chinese chip companies regularly hold meetings with semiconductor equipment manufacturers from South Korea and Japan to purchase tools for HBM development. Currently, CXMT, Tongfu Microelectronics, and XMC have not responded to these reports.

CXMT and XMC are both private companies that have received funding from local governments in China to drive technological development amid the country’s vigorous efforts to develop its semiconductor industry.

There also are reports indicating that Huawei, the Chinese tech giant subject to US sanctions, looks to collaborate with other local companies to produce HBM2 chips by 2026. According to a report from The Information, a group led by Huawei aimed at producing HBM chips includes Fujian Jinhua Integrated Circuit.

As per market reports cited by Reuters, China’s current focus is on HBM2. While the US has not restricted the export of HBM chips, HBM3 chips are manufactured using US technology, which many Chinese companies, including Huawei, are prohibited from using.

According to the analysis by Trendforce, the research and manufacturing of HBM involve complex processes and technical challenges, including wafer-level packaging, testing technology, design compatibility, and more. CoWoS is currently the mainstream packaging solution for AI processors, and in AI chips utilizing CoWoS technology, HBM integration is also incorporated.

CoWoS and HBM involves processes such as TSV (Through-Silicon Via), bumps, microbumps, and RDL (Redistribution Layer). Among these, TSV accounts for the highest proportion of the 3D packaging cost of HBM, close to 30%.

Read more

• [News] XMC Initiates IPO Plan, Potentially Becoming China’s First HBM Foundry
• [News] Three-way Contest for HBM Dominance, Uncertainties Surrounding China’s Supply Chain Involvement

(Photo credit: CXMT)

NOR Flash manufacturer Wuhan Xinxin Semiconductor Manufacturing Co. (XMC) recently disclosed an IPO counseling filing with the Hubei Securities Regulatory Bureau, according to the official website of the China Securities Regulatory Commission. Its recently announced bidding project may indicate its ambition to become China’s first HBM foundry, according to the report by Chinese media Semi Insights.

As per information from its website, XMC provides 12-inch foundry services for NOR Flash, CIS, and Logic applications with processes of 40 nanometers and above. Originally a wholly-owned subsidiary of Yangtze Memory Technologies (YMTC), XMC announced in March its first external financing round, increasing its registered capital from approximately CNY 5.782 billion to about CNY 8.479 billion. Its IPO counseling filing also indicates that it is still majority-owned by YMTC, with a shareholding ratio of 68.1937%.

According to market sources cited in the same report, XMC’s initiation of external financing and IPO plan is primarily aimed at supporting the significant expansion during a crucial development phase for YMTC. Given the substantial scale of YMTC, completing an IPO within three years poses challenges. Therefore, XMC was chosen as the IPO entity to enhance financing channels.

It is noteworthy that XMC also announced its latest bidding project on HBM (High Bandwidth Memory) – related advanced packaging technology R&D and production line construction, according to local media.

The project indicates the company’s capability to apply three-dimensional integrated multi-wafer stacking technology to develop domestically produced HBM products with higher capacity, greater bandwidth, lower power consumption, and higher production efficiency. With plans to add 16 sets of equipment, XMC’s latest project aims to achieve a monthly output capacity of over 3000 wafers (12 inches), showing its ambition of becoming China’s first HBM foundry.

On December 3, 2018, XMC announced the successful development of its three-dimensional wafer stacking technology based on its three-dimensional integration technology platform. This marks a significant advancement for the company in the field of three-dimensional integration technology, enabling higher density and more complex chip integration.

Currently, XMC has made much progress in the research and development of three-dimensional integrated multi-wafer stacking technology, which has been evident in the successful development of three-wafer stacking technology, the application of three-dimensional integration technology in back-illuminated image sensors, advancements in HBM technology research and industrialization efforts, as well as breakthroughs in the 3D NAND project.

Read more

• [News] China’s Chip Production Surges by 40% in Q1
• [News] Three-way Contest for HBM Dominance, Uncertainties Surrounding China’s Supply Chain Involvement

(Photo credit: XMC)