From the current landscape of publicly available DRAM technologies, the industry is expected to perceive 3D DRAM as one of the solutions to the challenges faced by DRAM technology, marking it as a pivotal direction for the future memory market.

Is 3D DRAM similar to 3D NAND? How will the industry address technological bottlenecks such as size limitations? What are the strategies of major players in the field?

• Understanding 3D DRAM Technology

The circuitry of DRAM consists of a transistor and a capacitor, where the transistor is responsible for transmitting electrical currents to write or read information (bits), while the capacitor stores the bits.

DRAM finds wide application in modern digital electronic devices such as computers, graphics cards, portable devices, and gaming consoles, due to its low cost and high capacity memory.

The development of DRAM primarily focuses on increasing integration by reducing circuit line widths. However, as line widths reach the 10nm range, physical limitations such as capacitor current leakage and interference significantly increase.

To address these issues, the industry has introduced new materials and equipment like high dielectric constant (high-K) deposition materials and Extreme Ultraviolet (EUV) devices.

Nevertheless, from the perspective of chip manufacturers, miniaturizing the manufacturing of 10nm or more advanced chips remains a significant challenge in current technology research and development. Additionally, the competition for advanced processes, particularly at 2nm and below, has intensified recently.

In an era marked by continuous technological advancements, the semiconductor industry has turned its attention to the evolution of NAND technology. To overcome scaling limitations, transistors are transitioning from a planar to a 3D architecture, increasing the number of storage units per unit area. This concept of 3D DRAM architecture has entered the public sphere.

In traditional DRAM, transistors are integrated on a flat plane. However, in 3D DRAM, transistors are stacked into multiple layers, thereby dispersing the transistors. It is believed that adopting a 3D DRAM structure can widen the gaps between transistors, reducing leakage currents and interference.

From a theoretical perspective, 3D DRAM technology breaks the conventional paradigm of memory technology. It is a novel storage method that stacks storage cells above logic units, enabling higher capacities within a unit chip area.

In terms of differentiation, traditional DRAM requires complex operational processes for reading and writing data, whereas 3D DRAM can directly access and write data through vertically stacked storage units, significantly enhancing access speeds. The advantages of 3D DRAM not only include high capacity and fast data access but also low power consumption and high reliability, meeting various application needs.

In terms of application areas, the high speed and large capacity of 3D DRAM will help improve the efficiency and performance of high-performance computing. The compact size and large capacity of 3D DRAM make it an ideal memory solution for mobile devices. The large capacity and low power consumption characteristics of 3D DRAM can meet the real-time data processing and transmission requirements of the Internet of Things (IoT) field.

Furthermore, since the advent of the AI era with ChatGPT, AI applications have surged, and AI servers are expected to become a strong driving force for the long-term growth in storage demand.

Micron’s chief business officer previously stated in an interview with Reuter that a typical AI server has up to eight times the amount of DRAM and three times the amount of NAND that a normal server has.

• Continued Industry Focus on 3D DRAM

The DRAM market remains highly concentrated, currently dominated by key players such as Samsung Electronics, SK Hynix, and Micron Technology, collectively holding over 93% of the entire market share.

According to a report from TrendForce, as of the third quarter of 2023, Samsung leads the global market with a share of 38.9%, followed by SK Hynix (34.3%) and Micron Technology (22.8%).

Currently, 3D DRAM is in its early stages of development, with companies like Samsung actively joining the research and development battleground. The competition is intense as various players strive to lead in this rapidly growing market.

• Samsung: 4F2 DRAM

Since 2019, Samsung has been conducting research on 3D DRAM and announced the industry’s first 12-layer 3D-TSV (Through-Silicon Via) technology in October of the same year. In 2021, Samsung established a next-generation process development research team within its DS division, focusing on research in this field.

At the 2022 SAFE Forum, Samsung outlined the overall 3DIC journey of Samsung Foundry and indicated its readiness to address DRAM stacking issues with a logic-stacked chip, SAINT-D. The design aims to integrate eight HBM3 chips onto one massive interposer chip.

In May 2023, as per sources cited by “The Elec,” Samsung Electronics formed a development team within its semiconductor research center to mass-produce 4F2 structured DRAM.

The goal is reportedly to apply 4F2 to DRAM at 10nm processes or more advanced nodes, as DRAM cell scaling has reached its limit. The report suggests that if Samsung’s 4F2 DRAM storage unit structure research is successful, the chip die area can be reduced by around 30% compared to existing 6F2 DRAM storage unit structures without changing the node.

In October of the same year, at the “Memory Technology Day” event, Samsung Electronics announced its plans to introduce a new 3D structure in the next-generation 10-nanometer more advanced nodes DRAM, rather than the existing 2D planar structure. The aim of this project is to increase the production capacity of a chip by over 100G.

At the “VLSI Symposium” held in Japan last year, Samsung Electronics presented a paper containing research results on 3D DRAM and showcased detailed images of 3D DRAM as an actual semiconductor implementation.

According to a report by The Economic Times, Samsung Electronics recently announced the opening of a new R&D laboratory in Silicon Valley, USA, dedicated to the development of next-generation 3D DRAM.

The laboratory is operated under Silicon Valley’s Device Solutions America (DSA) and is responsible for overseeing Samsung’s semiconductor production in the United States, as well as focusing on the development of new generations of DRAM products.

• SK Hynix – Introducing IGZO as the Channel Material for Future DRAM

Per SK Hynix’s research, the IGZO channel is attracting attention to improve the refresh characteristics of DRAM.

Reportedly, IGZO thin film transistors have been used in the display industry for a long time due to their moderate carrier mobility, extremely low leakage current and substrate size scalability. It can be a candidate for a stackable channel material for future DRAM.

• NEO – 3D X-DRAM Offers 8x Density Boost

NEO Semiconductor, a US memory technology company, introduces its groundbreaking technology, 3D X-DRAM, aimed at overcoming the capacity limitations of DRAM.

3D X-DRAM features the first-ever array structure of DRAM units based on Floating Body Cell (FBC) technology, akin to 3D NAND. Similar to 3D NAND Flash, its logic involves stacking layers to increase memory capacity. The FBC technology in 3D NAND Flash enables the formation of a vertical structure with the addition of a layer mask, offering high yield, low cost, and a significant density boost.

According to Neo’s estimates, the 3D X-DRAM technology can achieve a density of 128 Gb across 230 layers, which is eight times the current density of DRAM. NEO proposes a target of an eightfold capacity increase every decade, aiming to achieve a capacity of 1Tb between 2030 and 2035, representing a 64-fold increase compared to the current core capacity of DRAM.

This expansion is intended to meet the growing demand for high-performance and large-capacity semiconductor storage, especially for AI applications like ChatGPT.

“3D X-DRAM will be the absolute future growth driver for the Semiconductor industry,” said Andy Hsu, Founder and CEO of NEO Semiconductor.

• Japanese Research Team: BBCube 3D Outperforms DDR5 by 30x

A research team at the Tokyo Institute of Technology in Japan has introduced a groundbreaking 3D DRAM stacking design technology called BBCube, which enables superior integration between processing units and DRAM.

The most significant aspect of BBCube 3D lies in achieving a three-dimensional connection between processing units and DRAM instead of the traditional two-dimensional linkages. The team employs an innovative stacking structure while using an innovative stacked structure in which the PU dies sit atop multiple layers of DRAM, all interconnected via through-silicon vias (TSVs).

The overall structure of BBCube 3D is compact, devoid of typical solder microbumps, and utilizes TSVs instead of longer wires, collectively contributing to achieving low parasitic capacitance and low resistance, thereby enhancing the electrical performance of the device in various aspects.

The research team evaluated the speed of the new architecture and compared it with two of the most advanced memory technologies, DDR5 and HBM2E. Researchers claim that BBCube 3D could potentially achieve a bandwidth of 1.6 terabytes per second, which is 30 times higher than DDR5 and 4 times higher than HBM2E.

Furthermore, due to features like low thermal resistance and low impedance in BBCube, potential thermal management and power issues associated with 3D integration could be mitigated. The new technology significantly improves bandwidth while consuming only 1/20 and 1/5 of the bit access energy compared to DDR5 and HBM2E, respectively.

• Conclusion

The evolution of DRAM technology from 1D to 2D and now to the diverse structures of 3D has offered the industry various solutions to address its challenges. However, optimizing and improving manufacturing costs, durability, and reliability remain significant challenges in advancing 3D DRAM technology. Due to the difficulties in developing new materials and physical limitations, the commercialization of 3D DRAM still requires some time.

Based on the current research progress, the industry is actively engaged in the development of 3D DRAM, which are still in the early stages. According to industry insiders, it is predicted that 3D DRAM will begin to emerge around 2025, with actual mass production becoming feasible after 2030.

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• Top 10 Foundries Experience 7.9% QoQ Growth in 3Q23, with a Continued Upward Trend Predicted for Q4, Says TrendForce

(Photo credit: Samsung)

TrendForce releases latest trends in memory spot prices. With subdued DRAM supply and demand, transactions are limited. NAND Flash shows low trading volumes as well, expected to persist until after the Chinese New Year. Details below:

DRAM Spot Market:

DRAM spot prices are rising steadily, with larger hikes for chips and smaller increases for modules. Regarding chip spot prices, DDR5 products have shown a sharper price increase compared to DDR4 products. However, the quantities that DRAM suppliers have released into the spot market have been fairly limited since the first quarter is the slow season, so transaction volumes are also modest.

Currently, some Chinese OEMs are winding down their operations in preparation for the Lunar New Year holiday, so the state of spot trading is expected to remain like this until the end of the holiday. The average spot price of the mainstream chips (i.e., DDR4 1Gx8 2666MT/s) rose by 1.00% from US$1.903 last week to US$1.922 this week.

NAND Flash Spot Market:

Suppliers are maintaining an extremely restricted shipment on 3D wafers, which explains the steady increase of prices despite low transactions, though the elevation of prices has fallen below that of recent DRAM spots. Client SSD is also amplifying in partial prices from ongoing demand of replenishment among fabs.

A number of Chinese fabs are going on holiday with Chinese New Year arriving imminently, and the current transaction status is likely to carry on until after the holiday. 512Gb TLC wafer spots have risen by 6.77% this week, arriving at US$3.437.

South Korean memory giant SK Hynix has released its financial results for the fourth quarter of 2023 and the full year 2023, ending on December 31, 2023. In the fourth quarter, the revenue reached KRW 11.306 trillion, operating profit amounted to KRW 346 billion, and net loss was KRW 1.38 trillion. The operating profit margin for Q4 2023 was 3%, with a net profit margin of negative 12%.

Source: SK Hynix

SK Hynix noted that, with the rebound in the memory market, the operating profit for the fourth quarter of 2023 reached KRW 346 billion, successfully marking a turnaround from losses. This signifies that SK Hynix, in just one year, has managed to break free from the continuous operating losses experienced since the fourth quarter of 2022.

SK Hynix emphasizes that the overall memory market conditions improved in the last quarter of 2023 with demand for AI server and mobile applications increasing and average selling price (ASP) rising. 

Simultaneously, the effective implementation of a profit-oriented business plan by SK Hynix has enabled the company to achieve the goal of turning losses into profits within just one year.

Source: SK Hynix

Furthermore, SK Hynix has reduced the cumulative scale of operating losses that persisted until Q3 2023. In total, the consolidated revenue for 2023 reached KRW 32.766 trillion, with an operating loss of KRW 7.73 trillion and a net loss of KRW 9.138 trillion. Overall, the operating loss rate for 2023 is 24%, and the net loss rate is 27%.

SK Hynix also notes that in the DRAM sector for 2023, the company actively addressed customer demands. The revenue for the company’s flagship products, DDR5 and HBM3, increased by more than four and five times, respectively, compared to 2022.

Additionally, considering the relatively slow recovery in the NAND Flash memory market, the business plan primarily focuses on investment and cost efficiency.

In response to the growing trend in demand for high-performance DRAM, SK Hynix will smoothly proceed with the mass production of HBM3e memory for AI and the development of HBM4.

TrendForce’s earlier research into the HBM market indicates that NVIDIA plans to diversify its HBM suppliers for more robust and efficient supply chain management. The progress of HBM3e, as outlined in the timeline below, shows that SK Hynix provided its 8hi (24GB) samples to NVIDIA  in mid-August.

Simultaneously, the company aims to supply high-performance and high-capacity products like DDR5 and LPDDR5T to the server and mobile markets.

Moreover, to address the continued growth in demand for AI servers and the widespread adoption of edge AI computing applications, SK Hynix will exert efforts in the development of high-capacity server module MCR DIMM and mobile module LPCAMM2 to respond to the ever-increasing demand for AI servers and on-device AI adoption.

For NAND, the company aims to continue to improve profitability and stabilize the business by expanding sales of premium products such as eSSD, expected to improve profitability and strengthen internal management.

Lastly, SK Hynix emphasizes its commitment to maintaining and enhancing profitability and efficiency by continuing to expand the production of high-value-added products in 2024, similar to its strategy in 2023. The company will focus on minimizing capital expenditures while prioritizing stable business operations. 

“We achieved a remarkable turnaround, marking the first operating profit in the fourth quarter following a protracted downturn, thanks to our technological leadership in the AI memory space,” said Kim Woohyun, Vice President and Chief Financial Officer (CFO) at SK Hynix.

Kim further stated, “We are now ready to grow into a total AI memory provider by leading changes and presenting customized solutions as we enter an era for a new leap forward.”

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(Photo credit: SK Hynix)

According to TrendForce’s latest report on memory spot price trends, the DRAM spot market is experiencing a clear upward trend driven by contract market demand. In contrast, the NAND Flash market appears relatively sluggish. Details are as follows:

DRAM Spot Market:

The significant rise in contract prices has also led to a corresponding increase in spot prices this week, and both DDR4 and DDR5 chips are experiencing a price rally. TrendForce has observed that spot buyers’ procurement quantities are not based on actual demand. Buyers are instead banking on future market conditions and raising their inventory levels. Hence, even though there are clear signs of quotes rising, transactions are still limited in terms of quantity. The average spot price of mainstream chips (i.e., DDR4 1Gx8 2666MT/s) rose by 0.69% from US$1.883 last week to US$1.896 this week.

NAND Flash Spot Market:

The spot market of NAND Flash has been rather sluggish compared to that of DRAM. 3D wafers, having risen in prices for a long while, are relatively stagnated now, where the mainstream 512GB TLC is retained at approximately US$3.3. Prices for other finished products are also relatively flat, with sporadic demand for replenishment, and no further magnification has been seen from overall transactions. 512Gb TLC wafer spots have risen by 0.97% this week, arriving at US$3.219.

According to the latest memory spot price trends released by TrendForce, the DRAM spot market is experiencing limited upswing due to poor channel demand, while the NAND Flash market is expected to enter a period of price stabilization, with the upswing also anticipated to converge. Details are as follows:

DRAM Spot Market:

In the spot market, Kingston has finally raised prices of DDR4 and DDR5 modules after a year without price hikes. However, Kingston has not raised prices significantly, and related transactions have been rather tepid. Currently, spot prices are converging on contract prices for DRAM modules. Since channel demand is not particularly strong, this round of price hikes is still limited. The average spot price of the mainstream DRAM chips (i.e., DDR4 1Gx8 2666MT/s) rose by 1.20% from US$1.833 last week to US$1.855 this week.

NAND Flash Spot Market:

The spot market, having undergone a significant price increment within a short span of time previously, has returned to its off-season demand after the dissipation of stocking momentum for year-end festivals, where orders for memory cards, USB flash drives, and SSD are lingering amidst sluggishness. The spot market, as projected by TrendForce, will be entering a price consolidation phase, followed by a subsidence in the increase of prices. 512Gb TLC wafer spots have risen by 2.28% this week, arriving at US$3.188.