IC Manufacturing, Package&Test


2023-08-23

[News] TSMC Faces Capacity Shortage, Samsung May Provide Advanced Packaging and HBM Services to AMD

According to the Korea Economic Daily. Samsung Electronics’ HBM3 and packaging services have passed AMD’s quality tests. The upcoming Instinct MI300 series AI chips from AMD are planned to incorporate Samsung’s HBM3 and packaging services. These chips, which combine central processing units (CPUs), graphics processing units (GPUs), and HBM3, are expected to be released in the fourth quarter of this year.

Samsung is noted as the sole provider capable of offering advanced packaging solutions and HBM products simultaneously. Originally considering TSMC’s advanced packaging services, AMD had to alter its plans due to capacity constraints.

The surge in demand for high-performance GPUs within the AI landscape benefits not only GPU manufacturers like NVIDIA and AMD, but also propels the development of HBM and advanced packaging.

In the backdrop of the AI trend, AIGC model training and inference require the deployment of AI servers. These servers typically require mid-to-high-end GPUs, with HBM penetration nearing 100% among these GPUs.

Presently, Samsung, SK Hynix, and Micron are the primary HBM manufacturers. According to the latest research by TrendForce, driven by the expansion efforts of these original manufacturers, the estimated annual growth rate of HBM supply in 2024 is projected to reach 105%.

In terms of competitive dynamics, SK Hynix leads with its HBM3 products, serving as the primary supplier for NVIDIA’s Server GPUs. Samsung, on the other hand, focuses on fulfilling orders from other cloud service providers. With added orders from customers, the gap in market share between Samsung and SK Hynix is expected to narrow significantly this year. The estimated HBM market share for both companies is about 95% for 2023 to 2024. However, variations in customer composition might lead to sequential variations in bit shipments.

In the realm of advanced packaging capacity, TSMC’s CoWoS packaging technology dominates as the main choice for AI server chip suppliers. Amidst strong demand for high-end AI chips and HBM, TrendForce estimates that TSMC’s CoWoS monthly capacity could reach 12K by the end of 2023.

With strong demand driven by NVIDIA’s A100 and H100 AI Server requirements, demand for CoWoS capacity is expected to rise by nearly 50% compared to the beginning of the year. Coupled with the growth in high-end AI chip demand from companies like AMD and Google, the latter half of the year could experience tighter CoWoS capacity. This robust demand is expected to continue into 2024, potentially leading to a 30-40% increase in advanced packaging capacity, contingent on equipment readiness.

(Photo credit: Samsung)

2023-08-23

Malaysia: Rising Global Hub for Semiconductor Backend Testing and Packaging in Supply Chain Shift

As reported by TechNews, a media partner of TrendForce, Southeast Asia and India, equipped with the advantages of demographic dividends, strategic geographic positioning, manufacturing capabilities, and rapidly growing economic markets, have undoubtedly emerged as the preferred destinations for the technology industry amidst the global supply chain transition prompted by geopolitical factors.

As supply chains actively seek production bases beyond China and governments introduce incentive programs and policy restrictions for localized supply, various Southeast Asian countries have become key hubs for different sectors. Vietnam has become a focal point for consumer electronics manufacturing such as laptops, watches, and headphones, while Thailand has become a preferred choice for automotive-related supply chains. Thailand and Malaysia host assembly bases for servers, and India is set to become a crucial hub for mobile phone production.

Apart from the movement of end-product assembling, the shift in the semiconductor supply chain has also garnered attention. With TSMC, Samsung, and Intel relocating wafer fabrication plants to the United States, Europe, and other regions, a significant cluster of semiconductor backend testing and packaging has been forming in Malaysia.

What Advantages Does Malaysia Offer to Attract Multinational Semiconductor Companies’ Investment, and What Is the Current Industry Landscape?

Firstly, Malaysia boasts higher education standards than neighboring countries. Among ASEAN nations, only Singapore and Malaysia employ the British legal system, providing a competitive edge for many companies’ location choices. Secondly, in terms of language proficiency, Malaysian citizens predominantly use English, Mandarin, and Malay, facilitating smooth communication with global enterprises.

Thirdly, Malaysia is home to two major ports—Port Klang and Port of Tanjung Pelepas—both ranked among the world’s top 15 ports, with substantial container handling capacity and global reach.

Lastly, the state of Penang stands as a semiconductor hub for Malaysia, having nurtured the semiconductor industry for several decades and holding a technological lead. Often referred to as the “Silicon Valley of the East,” Penang has primarily focused on producing chips for electronics, computers, and mobile phones. However, with the growing adoption of electric vehicles, the demand for automotive chips has surged. Concurrently, the green energy trend has propelled the need for solar panels and renewable energy sources. This optimistic outlook for the semiconductor industry has once again attracted numerous companies to establish facilities and expand production capacity.

Current State of Malaysia’s Semiconductor Industry

Looking at the recent dynamics of corporations over the past two years, the trend is evident that Malaysia is evolving into a center for semiconductor backend testing and packaging. Major global players have announced plans to establish or expand operations in Penang. Intel, for example, announced a $6.46 billion investment in Malaysia in 2021, focusing on advanced packaging capabilities in Penang and Kedah.

Texas Instruments declared its intent to construct semiconductor testing and packaging plants in Kuala Lumpur and Malacca, with a total investment of up to $2.7 billion. Infineon is investing $5.45 billion to expand existing facilities, producing silicon carbide and entering the electric vehicle sector. Bosch Group is investing $358 million in stages to strengthen its semiconductor supply chain position in Penang. ASE Technology Holding, also began construction on a new testing facility in Penang at the end of last year.

With the influx of semiconductor giants, Malaysia’s position in the semiconductor industry has become increasingly critical. The distinct production base trends, aligned with the strengths of various Southeast Asian countries, have become clear. The restructuring of supply chains and the transformation of production centers undoubtedly remain the focus and challenge for global companies.

(Photo credit: ASE)

2023-08-22

TSMC’s CoWoS Dominance: Amkor, ASE, JCET’s Response

In response to the demands of high-performance computing, AI, 5G, and other applications, the shift towards chiplet and the incorporation of HBM memory has become inevitable for advanced chips. As a result, packaging has transitioned from 2D to 2.5D and 3D formats.

With chip manufacturing advancing towards more advanced process nodes, the model of directly packaging chips using advanced packaging technology from wafer foundries has emerged. However, this approach also signifies that wafer foundries will encroach upon certain aspects of traditional assembly and testing, leading to ongoing discussions about the ‘threat’ to traditional assembly and test firms since TSMC’s entry into advanced packaging in 2011.

But is this perspective accurate?

In fact, traditional assembly and test firms remain competitively positioned. Firstly, numerous electronic products still rely on their diverse traditional packaging techniques. Particularly, with the rapid growth of AIoT, electric vehicles, and drones, the required electronic components often still adopt traditional packaging methods. Secondly, faced with wafer foundries actively entering the advanced packaging domain, traditional assembly and test firms have not been idle, presenting concrete solutions to the challenge.

Advanced Packaging Innovations by Traditional Assembly and Test Firms

Since 2023, AI and AI server trends have rapidly emerged, driving the demand for AI chips. TSMC’s 2.5D advanced packaging technology, known as CoWoS, has played a pivotal role. However, the sudden surge in demand stretched TSMC’s capacity. In response, major traditional assembly and test firms such as ASE and Amkor have demonstrated their technical prowess and have no intention of being absent from this field.

For instance, ASE’s FOCoS technology enables the integration of HBM and ASIC. It restructures multiple chips into a fan-out module, which is then placed on the substrate, achieving the integration of multiple chips. Their FOCoS-Bridge technology, unveiled in May this year, utilizes silicon bridges (Si Bridge) to accomplish 2.5D packaging, bolstering the creation of advanced chips required for applications like AI, data centers, and servers.

Additionally, SPIL, a subsidiary of ASE, offers the FO-EB technology, a powerful integration of logic IC and HBM. As depicted below, this technology eschews silicon interposers, utilizing silicon bridges and redistribution layers (RDL) for connections, similarly capable of 2.5D packaging.

Another major player, Amkor, has not only collaborated with Samsung to develop the H-Cube advanced packaging solution but has also long been involved in ‘CoWoS-like technology.’ Through intermediary layers and through-silicon via (TSV) technology, Amkor can interconnect different chips, also possessing 2.5D advanced packaging capabilities.

China’s major assembly and test firm, Jiangsu Changjiang Electronics Technology (JCET), employs the XDFOI technology, integrating logic ICs with HBM through TSV, RDL, and microbump techniques, aimed at high-performance computing.

Given the recent surge in demand for high-end GPU chips, TSMC’s CoWoS capacity has fallen short, and NVIDIA is actively seeking support from second or even third suppliers. The ASE Group and Amkor have secured partial orders through their packaging technologies. This clearly illustrates that traditional assembly and test firms, even when faced with the entry of wafer foundries into the advanced packaging domain, still possess the capability to compete.

In terms of product types, wafer foundries focus on advanced packaging technology for major players like NVIDIA and AMD. Meanwhile, other products not in the highest-end category still opt for traditional assembly and test firms like ASE, Amkor, and JCET for manufacturing. Overall, with their presence in advanced packaging, as well as a hold on the expanding existing packaging market, traditional assembly and test firms continue to maintain their market competitiveness.

(Photo credit: Amkor)

2023-08-21

[News] IC Design Chip Tape-Out Expected to Rebound at the Earliest Next Year

According to Taiwan’s Economic Daily, the consumer market is experiencing starkly low demand, causing IC design firms primarily relying on mature processes, such as those in driver ICs, power management ICs, CMOS image sensors (CIS), and microcontrollers (MCUs), to adopt a notably cautious approach in placing orders. Some manufacturers are hesitating to place orders due to persistently high inventory levels.

The industry consensus is that IC design companies are expected to increase their orders in mature processes, with the earliest effects possibly emerging by 2024, implying that the mature process market conditions might not improve significantly until the end of this year.

The consumer market entered a period of economic downturn in the latter half of last year, which in turn affected industries such as PCs, smartphones, and networking. This not only led to a surge in inventory levels for IC design firms but also significantly curtailed the momentum for chip tape-out. Looking ahead to the second half of this year, while inventory levels across various sectors have largely returned to normal, chip tape-out for Q3 have notably declined compared to Q2.

In particular, demand for high-speed I/O in the PC sector and Board Management Controller for data centers remains notably weak. The supply chain indicates that PC demand for the second quarter, driven by advanced stocking, has dampened the typical peak season effect for the latter half of the year. This trend is evident across desktop PCs, laptops, and Chromebooks.”

As for the smartphone sector, after various research institutions revised down this year’s smartphone market size, the supply chain’s chip tape-out momentum has cooled down significantly. Only Qualcomm has increased its tape-out momentum to semiconductor foundries in the first half of the year, while MediaTek continues to adhere to a conservative strategy as of now.

(Photo credit: SMIC)

2023-08-21

[News] Speculations of TSMC Considering Third Fiscal Forecast Downgrade

According to Taiwan’s Commercial Times, TSMC continues to face challenges from ongoing price undercutting and competitive bidding in mature semiconductor manufacturing processes. Concerns arise about the company’s ability to offset these challenges with AI-related orders. Reports from the market suggest that on July 20th, TSMC revised down its fiscal forecast for the year for the second time, slashing its annual revenue target (in USD) from an anticipated decline of 1% to 6% to a significant reduction of 10%. However, given the persistent sluggish economic conditions of late, there is speculation of a potential third adjustment that could lead to a year-on-year revenue decline of 12%.

In the current investment landscape, artificial intelligence has become a focal point this year. Additionally, the strong demand for CoWoS packaging has contributed to a positive outlook for TSMC. However, it’s important to note that AI’s contribution to TSMC’s overall revenue is not substantial.

Using the popular H100 model from NVIDIA as an example, it only impacts TSMC’s performance in the N4 manufacturing process. This limited contribution falls short of countering the downward trend in consumer product demand utilizing the N3 and N7 manufacturing processes.

Market Speculations Emerge About TSMC’s Performance and Challenges

Market sources indicate that TSMC’s performance in mature processes (7nm and above) accounted for 47% of its output in the second quarter. While prices managed to hold steady in the first half of the year, ongoing softness in end-user demand has prompted Chinese manufacturers to engage in aggressive expansion, price reduction, and competition for orders, which inevitably impacts TSMC. There are even reports circulating about a potential loosening of 7nm production capacity.

In response, TSMC stated that its perspective and outlook on market demand align with the contents of its July press conference. As of now, no new updates are available. Furthermore, TSMC refrains from commenting on market speculations or shifts in customer business dynamics.

(Photo credit: TSMC)

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