After Samsung announced a major breakthrough in 2nm, securing the first batch of orders from Japanese AI company Preferred Networks, its rival TSMC is also advancing. According to reports from Wccftech and ET News, TSMC is set to begin trial production of 2nm chips next week, which would reportedly be used in the upcoming iPhone 17 lineup in 2025.

The reports note that the trial production will be conducted in TSMC’s Baoshan Plant in Hsinchu, northern Taiwan, as facilities have been brought in during the second quarter. The iPhone 17 lineup is rumored to be the first to feature TSMC’s 2nm chips. Following that, the chips will likely be used in the 14-inch and 16-inch MacBook Pro models.

According to a previous report by MoneyDJ, TSMC’s 2nm production bases are located in Hsinchu Science Park and Kaohsiung, southern Taiwan, while the mass production is expected to kick off in Hsinchu first, with an initial monthly capacity of approximately 30,000 to 35,000 wafers.

Apple and TSMC share a long history of partnership, as the smartphone giant’s A17 Pro, M3 and M4 chips are all manufactured with TSMC’s 3nm node. As TSMC reportedly plans to enter 2nm trial production next week for Apple’s M5 chip, the company’s target for 2nm to enter mass production in 2025 would be on schedule, Wccftech notes.

According to Wccftech, The M5 chip, compared to its predecessor M4, is expected to have performance increase of 10 to 15 percent and a power consumption reduction of up to 30 percent compared to current 3nm-based chips.

Regarding the progress of other semiconductor heavyweights on 2nm, Samsung is said to commence mass production of 2nm chips for mobile devices by 2025. The initial SF2 2nm process will be ready next year, followed by an enhanced version, SF2P, in 2026. Its latest 2nm process, SF2Z, has incorporated optimized backside power delivery network (BSPDN) technology, and will enter mass production in 2027.

On the other hand, Intel’s 20A manufacturing technology (2nm) is reportedly scheduled for launch in 2024, introducing two technologies: RibbonFET surround gate transistors and BSPDN.

Read more

• [News] The Imminent Arrival of 2-Nanometer Advanced Process
• [News] TSMC Reportedly Invests over USD 12.3 Billion in EUV, Advancing in 2nm Production

(Photo credit: Apple)

Samsung Electronics has received the first client for its 2nm process. According to the official press release from Samsung on July 9th, Samsung Electronics will provide turnkey semiconductor solutions using the 2nm process and the advanced 2.5D packaging technology Interposer-Cube S (I-Cube S) to Japanese AI company Preferred Networks.

Per a previous report by SamMobile, Samsung is set to commence mass production of 2nm chips for mobile devices by 2025. The initial SF2 2nm process will be ready next year, followed by an enhanced version, SF2P, in 2026. In addition, according to Samsung’s press release, its latest 2nm process, SF2Z, has incorporated optimized backside power delivery network (BSPDN) technology, and will enter mass production in 2027.

Preferred Networks was founded in 2014 and is in the field of AI deep learning development. The company has attracted significant investments from major Japanese industrial enterprises such as Toyota, NTT, and Fanuc. The order placed with Samsung’s foundry division for 2-nanometer AI chips also includes HBM and advanced packaging.

As per the official release, Junichiro Makino, VP and Chief Technology Officer (CTO) of Computing Architecture at Preferred Networks stated that as Samsung Electronics’ 2nm GAA process will significantly support Preferred Networks’ ongoing efforts to build highly energy-efficient, high-performance computing hardware that meets the ever-growing computing demands from generative AI technologies, especially large language models.

Driven by the strong demand from AI chips, Samsung expects the revenue of global chip industry to grow to USD 778 billion by 2028, according to Siyoung Choi, President and General Manager of the Foundry Business in Samsung, the report noted.

Read more

• [News] Samsung Unveils Next-gen 2nm Node Roadmap; SF2Z with Backside Power Delivery to Enter Production in 2027
• [News] Samsung Secures 2-Nanometer Order from Japanese AI Startup Preferred Networks

(Photo credit: Samsung)

Unlike other major semiconductor manufacturers, including Intel and TSMC, memory giant Micron is not in a hurry to adopt EUV (extreme ultraviolet) lithography for its DRAM production. However, according to a latest report from Technews, in 2024, Micron plans to begin trial production using EUV on its 1γ (1-gamma) process technology at 10-nm level.

The report also notes that currently, all of the company’s mass-produced products are made using DUV (deep ultraviolet) lithography. However, after entering trial production in 2024 with EUV, Micron also anticipates that this process technology will enter large-scale production in 2025.

Another Korean memory giant, Samsung, announced in 2020 that it has successfully shipped one million of the industry’s first 10nm-class (D1x) DDR4 (Double Date Rate 4) DRAM modules based on EUV technology.

In 2021, SK hynix has started mass production of its 10-nm DRAM chips using EUV technology, and is said to invest USD 1.5 billion this year to acquire 8 advanced EUV lithography machines, according to an earlier report from Disc Manufacturer.

Previously, Micron CEO Sanjay Mehrotra stated during an earnings call that the trial production of 10-nm-class 1γ (1-gamma) process DRAM using EUV lithography is progressing well, and they are on track to achieve mass production by 2025 as planned. Currently, Micron is developing the 10-nanometer-class 1γ process DRAM manufacturing technology using EUV lithography at its Hiroshima plant in Japan, which is also the first site for the trial production of 1γ memory, according to Technews.

In order to meet the strong demand for high-performance memory chips driven by AI, Micron is reportedly building a pilot production line for HBM in the U.S. and is considering producing HBM in Malaysia for the first time.

Read more

• [News] Micron’s HBM Expansion at Full Throttle: Rumored to Expand in US, Malaysia Also an Option
• [News] HBM Supply Shortage Prompts Micron’s Expansion, Expected Schedule in Japan and Taiwan Revealed

(Photo credit: ASML)

On July 1, GlobalFoundries (GF), a major foundry player, announced that it has acquired Tagore Technology’s production-verified proprietary GaN (Gallium nitride) power IP portfolio, which refers to a high-power density solution designed to enable higher efficiency and better performance of automobile, IoT, and AI data center applications where power supply is widely used.

Founded in January 2011, Tagore Technology focuses on developing GaN-on-Si (Gallium nitride on silicon) semiconductor technology for RF and power management applications.

As part of the acquisition, a team of veteran engineers from Tagore, dedicated to developing GaN technology, will join GF. “With this acquisition, GF takes another step toward accelerating the availability of GaN and empowering our customers to build the next generation of power management solutions that will reshape the future of mobility, connectivity and intelligence,” said Niels Anderskouv, chief business officer at GF.

It is worth mentioning that in February 2024, GF received a direct subsidy of USD 1.5 billion under the US CHIPS and Science Act, with part of the funds allocated to the mass production of critical technologies, including GaN.

By combining this manufacturing capability with the technical expertise of the Tagore team, GF is well positioned to transform the efficiency of AI systems and enable lower power consumption particularly pivotal for edge or IoT devices.

Read more

• [News] SK keyfoundry Advances in GaN Power Semiconductors, Reportedly Producing for Tesla Soon
• [News] Infineon in GaN and SiC Expansion Drive Advancements in the New Energy Market

(Photo credit: GF)

Google’s Tensor G4 could mark Samsung’s last mass-produced SoC, as earlier in May, Tensor G5 is reportedly adopting TSMC’s advanced 3nm process. Now here’s the latest development. According to a report by Wccftech, the chip, to be used in Google’s upcoming Pixel 10 lineup, has already reached tape-out, with mass production expected in 2025.

Google’s Tensor G5 would be its first fully self-designed smartphone SoC. Previous Tensor chips, somehow, were modifications from Samsung’s Exynos series, with Samsung being its foundry partner.

The report stated that Google’s decision to collaborate with TSMC is influenced by the Taiwanese semiconductor company’s established reliability in mass-producing wafers using its next-generation nodes.

Before Google, the foundry behemoth has already secured several major clients for its 3nm node. Both Qualcomm and Taiwanese smartphone fabless company MediaTek have reportedly adopted TSMC’s N3E node for their first 3nm chipsets. Apple’s upcoming A18 chips for iPhone 16 models, are said to be manufactured with TSMC’s N3E node as well, according to a report by Commercial Times.

On the other hand, regarding the progress of 3nm, Samsung is still struggling with the low yield rate for its latest Exynos 2500 processors. The company targets to increase the yield rate to over 60% before the product enters mass production, according to a previous report by Korean media outlet ZDNet Korea.

Read more

• [News] Google Reportedly Shifts Orders from Samsung to TSMC for Its Upcoming Tensor G5 in the Pixel 10 Series

(Photo credit: Google)