According to Taiwan’s TechNews report, Lu Donghui, Chairman of Micron Technology Taiwan, stated that in response to the growing demand in the AI market, Micron Technology Taiwan will continue to invest in advanced processes and packaging technologies to produce High Bandwidth Memory (HBM) products. Micron Technology Taiwan is the only Micron facility globally with advanced packaging capabilities.

Lu Donghui, speaking at a media event, mentioned that Micron had previously introduced the industry’s first 8-layer stack (8-High) 24GB HBM3 Gen 2 product, which is now in the sampling phase. This product boasts a bandwidth exceeding 1.2TB/s and a transmission rate exceeding 9.2Gb/s, which is 50% higher than other HBM3 solutions on the market. Micron’s HBM3 Gen 2 product offers 2.5 times better energy efficiency per watt compared to previous generations, making it ideal for high-performance AI applications.

Micron’s HBM3 Gen 2 memory products are manufactured using the most advanced 1-beta process technology in Taiwan and Japan. Compared to the previous 1-alpha process, the 1-beta process reduces power consumption by approximately 15% and increases bit density by over 35%, with each chip offering a capacity of up to 16Gb. Through Micron’s advanced packaging technology, the 1-beta process memory chips are stacked in 8 layers, and the complete HBM3 Gen 2 chips are packaged and sent to customers’ specified semiconductor foundries like TSMC, Intel, Samsung, or third-party packaging and testing facilities for GPUs, CPUs.

Lu Donghui highlighted that Taiwan’s robust semiconductor manufacturing ecosystem makes it the exclusive hub for Micron’s advanced packaging development worldwide. By combining this ecosystem with Micron’s offerings, they can provide customers with comprehensive solutions to meet market demands. While HBM products represent a relatively small portion of the overall memory market, their future growth potential is significant, with expectations to capture around 10% of the entire memory market in the short term.

(Photo credit: Micron)

According to Taiwan’s TechNews report, Chiang Shang-yi, former TSMC Co-COO and current Chief Semiconductor Strategist at Foxconn, shared insights during a Taiwan Television interview. He discussed his past role at TSMC, the potential impact of U.S. export restrictions on China’s semiconductor development, and revealed previously undisclosed stories. Chiang emphasized the need to reevaluate China’s approach to semiconductor manufacturing.

Chiang previously stated that he wouldn’t return to China, and when asked about geopolitical challenges in the region due to U.S. chip restrictions, he shared his experiences in China.

He mentioned that his initial focus was primarily on research and development, and while technical challenges were manageable, the most significant challenge was related to human interactions. Chiang also disclosed two instances where he experienced a lack of trust from Chinese authorities.

He explained that the headquarters of SMIC is in Shanghai, with its largest facility located in Beijing. On two separate occasions, senior executives were scheduled to visit the Beijing facility, and Chiang was instructed to participate. However, he was informed just a day prior that he, as a non-Chinese national, would not be allowed to attend these visits. Similar incidents occurred twice, leaving him with a rather uncomfortable impression.

Regarding the U.S. chip ban, Chiang acknowledged that China had invested heavily in semiconductors over the past decade, and the recent restrictions were a more recent development. However, he emphasized that even before the restrictions, China’s semiconductor industry faced challenges and that the way China pursued semiconductor development needed reevaluation.

On the other hand, Chiang discussed why TSMC has been successful, attributing it to its business model and rapid decision-making. He mentioned a proposal he made to establish a packaging unit within TSMC to address the bottleneck created by the end of Moore’s Law. This proposal, referred to as “Advanced Packaging,” was quickly approved by TSMC’s founder, Morris Chang, who provided the resources to make it happen. This initiative led to the development of CoWoS (Chip-on-Wafer-on-Substrate) technology.

However, despite the innovation, CoWoS initially faced challenges gaining business traction and was even considered a joke within the company. Chiang had to work hard to promote the technology to customers. During a dinner with a Qualcomm executive, Chiang learned that CoWoS’s price was too high for consideration, with the executive requiring a price reduction to one cent per minimeter square. Chiang returned to TSMC and urged R&D to lower costs while maintaining performance, eventually leading to the success of InFO (Integrated Fan-Out) technology.

Chiang mentioned that the first customer to embrace CoWoS technology was Huawei, primarily for GPU chips, well before AI applications gained prominence. He humorously credited the Qualcomm executive for saving him with a single sentence and emphasized that innovation needed to be practical, not just technological, to succeed in the industry.

According to a report from Taiwan’s TechNews, as we approach the fourth quarter, which marks the peak period for negotiations between the semiconductor manufacturing leader TSMC and its suppliers, the supply chain is indicating that TSMC is expected to follow a similar approach to that of 2022. This means that in anticipation of an unclear overall semiconductor market outlook for 2024, TSMC is likely to either slightly reduce prices or refrain from implementing price cuts when dealing with its suppliers.

Suppliers have noted that in 2022, TSMC generally adopted a strategy of minor price reductions or no price cuts during negotiations. This approach helped alleviate the pressure on suppliers facing inflation and rising raw material costs. However, for 2024, with the semiconductor industry’s overall recovery still uncertain, and procurement volumes not expected to increase significantly, it is anticipated that TSMC will maintain a similar stance with its suppliers as it did in 2022.

Considering the current state of the semiconductor industry, market analysts anticipate that TSMC’s revenue growth in the fourth quarter could reach between 7% and 9%. This growth is primarily attributed to the upcoming release of Apple’s iPhone 15 series in September, with shipment volumes expected to reach 86 million units. Additionally, the surge in market demand for data center chips from NVIDIA is contributing to TSMC’s robust performance. It’s projected that TSMC’s third-quarter revenue will be in the range of $16.5 billion to $17.5 billion, and the fourth quarter is expected to witness further growth, reaching $18.6 billion, representing an average quarterly growth of 8%.

However, despite the optimistic outlook for the fourth quarter, the prospects for 2024 may differ. This uncertainty stems from efforts by U.S. consumers and businesses to cope with high inflation, questions about potential interest rate hikes, and the looming possibility of an economic downturn. Additionally, China’s economic performance has been lackluster, and these two markets constitute a significant portion of TSMC’s revenue. This combination of factors results in a high level of uncertainty, which is expected to influence TSMC’s procurement strategies and bargaining power with suppliers in a more cautious manner, given the prevailing uncertain conditions.

(Photo credit: TSMC)

According to a report from Taiwan’s TechNews, Huawei’s Mate 60 Pro smartphone, powered by its in-house Kirin 9000S processor, quietly appeared on the market recently, testing has shown that its network speed approaches that of 5G. This development has sparked enthusiastic discussions in the market about the manufacturing and development of this chip.

Prominent analyst Andrew Lu also expressed that if the semiconductor manufacturer, SMIC, which handles the production of the Kirin 9000S processor, makes significant breakthroughs in both 7nm process technology and capacity, it should not be underestimated. Additionally, with Huawei’s reintroduction of the Kirin 9000S processor through the Mate 60 Pro, they are expected to continue launching products that are likely to have an impact on the mobile phone and mobile chip market.

Andrew Lu outlined the following points on his personal Facebook fan page:

1. The Kirin 9000S processor is likely manufactured by SMIC using N+2 process technology, with N+1 being a pseudo-7nm process that is closer to 8-9nm. N+2 is a 7nm process (not the rumored 5nm), but it does not use EUV, so multiple exposures are needed. Due to insufficient capacity, shipping 40 million units would likely take several months. Assuming a die size of 169mm² and an 80% yield rate, SMIC would need to prepare 144k N+2 capacity, this indicates a monthly production capacity requirement of 24,000 units. The monthly production capacity appears significantly higher than what was previously anticipated. If these assumptions hold, it indicates that SMIC has made significant breakthroughs in 7nm process technology and capacity.
2. Apple’s iPhone doesn’t emphasize Antutu benchmark scores as much, and Android phones typically fine-tune their systems for benchmarking, making comparisons between iOS and Android phones less fair. However, compared to other Android flagship phones scoring around 1.5-1.6 million, the Mate 60’s 1.1 million still falls short, but it excels in satellite phone functionality.
3. Huawei/Huawei’s HiSilicon’s return is likely to continue with the release of new devices, aiming to reach annual sales of 100 million phones within 5 years, which should not be difficult. This means Huawei/Huawei’s HiSilicon will regain approximately 5-10% of the global market share, while other phone and chip manufacturers will lose 5-10% of their market share with flagship brands likely being more affected.
4. Despite the U.S. putting SMIC on the Entity List, how does SMIC still have so much advanced process capacity? Lu Xingzhi believes that being placed on the Entity List doesn’t entirely prohibit companies from purchasing all advanced U.S. equipment (EUV scanners are absolutely prohibited), but it requires approval from the U.S. Department of Commerce to purchase such equipment. Additionally, the rapid emergence of many semiconductor startups in China (some of which disappear shortly after) makes it challenging for U.S. equipment manufacturers and the U.S. Department of Commerce to determine if the purchased equipment is being resold to SMIC. Therefore, SMIC’s expansion of advanced process capacity is not surprising. According to Lu’s data, SMIC’s capital intensity, capital expenditure as a percentage of revenue, was 110% over the past year, significantly higher than TSMC’s 50% and Samsung LSI’s and GlobalFoundries’ 40% range, indicating that capacity expansion is likely to be considerably higher than peers in the industry.

(Photo credit: Huawei)

TSMC’s CoWoS advanced packaging capacity shortage is causing limitations in NVIDIA’s AI chip output. Reports are emerging that NVIDIA is willing to pay a premium for alternative manufacturing capacity outside of TSMC, setting off a surge in massive overflow orders. UMC, the supplier of interposer materials for CoWoS, has reportedly raised prices for super hot runs and initiated plans to double its production capacity to meet client demand. ASE, an advanced packaging provider, is also seeing movement in its pricing.

In response to this, both UMC and ASE declined to comment on pricing and market rumors. In addressing the CoWoS advanced packaging capacity issue, NVIDIA previously confirmed during its financial report conference that it had certified other CoWoS packaging suppliers for capacity support and would collaborate with them to increase production, with industry speculation pointing towards ASE and other professional packaging factories.

TSMC’s CEO, C.C. Wei, openly stated that their advanced packaging capacity is at full utilization, and as the company actively expands its capacity, they will also outsource to professional packaging and testing factories.

It’s understood that the overflow effect from the inadequate CoWoS advanced packaging capacity at TSMC is gradually spreading. As the semiconductor industry as a whole adjusts its inventory, advanced packaging has become a market favorite.

Industry insiders point out that the interposer, acting as a communication medium within small chips, is a critical material in advanced packaging. With a broad uptick in demand for advanced packaging, the market for interposer materials is growing in parallel. Faced with high demand and limited supply, UMC has raised prices for super-hot-run interposer components.

UMC revealed that it has a comprehensive solution in the interposer field, including carriers, customed ASICs, and memory, with cooperation from multiple factories forming a substantial advantage. If other competitors are entering this space now, they might not have the quick responsiveness or abundant peripheral resources that UMC does.

UMC emphasized that compared to competitors, its competitive advantage in the interposer field lies in its open architecture. Currently, UMC’s interposer production primarily takes place in its Singapore plant, with a current capacity of about 3,000 units, with a target of doubling to six or seven thousand to meet customer demand.

Industry analysts attribute TSMC’s tight CoWoS advanced packaging capacity to a sudden surge in NVIDIA’s orders. TSMC’s CoWoS packaging had primarily catered to long-term partners, with production schedules already set, making it unable to provide NVIDIA with additional capacity. Moreover, even with tight capacity, TSMC won’t arbitrarily raise prices, as it would disrupt existing client production schedules. Therefore, NVIDIA’s move to secure additional capacity support through a premium likely involves temporary outsourced partners.

(Photo credit: NVIDIA)