NAND Flash


2024-07-24

[Insights] Memory Spot Price Update: Kingston Lowers DRAM Module Prices But Sees No Uptick in Sales

According to TrendForce’s latest memory spot price trend report. Details are as follows:

2024-07-24

[News] A New Round of Technological Innovation in Memory Market on the Road

Amid the wave of AI applications, the demand for high-performance memory continues to mushroom, with DRAM, represented by HBM, gaining significant traction. Meanwhile, to further meet market demand, memory manufacturers are  poised to embrace a new round of DRAM technological “revolution.”

  • 4F Square DRAM being Developed Smoothly

According to a report from Korean media outlet Chosun Biz, Samsung Electronics Vice President Changsik Yoo recently announced that Samsung’s next-generation DRAM technology is progressing well. In addition to the successful mass production of 1b DRAM, the development of 4F Square DRAM technology is also proceeding smoothly, with the initial sample of 4F Square DRAM set to be developed by 2025.

Industry sources cited by WeChat account DRAMeXchange indicate that the early DRAM cell structure was 8F Square, while currently commercialized DRAM mainly uses 6F Square. Compared to these two technologies, 4F Square employs a vertical channel transistor (VCT) structure, which can reduce the chip surface area by 30%.

As the cell area decreases, DRAM density and performance increase. Therefore, driven by applications like AI, 4F Square technology is gradually sought after by major storage manufacturers.

Previously, Samsung stated that many companies are working to transition their technology to 4F Square VCT DRAM, although some challenges need to be overcome, including the development of new materials like oxide channel materials and ferroelectrics.

Industry sources believe that the initial sample of Samsung’s 4F Square DRAM in 2025 might be for internal release. Another semiconductor manufacturer, Tokyo Electron, estimates that DRAM using VCT and 4F Square technology will come out between 2027 and 2028.

Furthermore, earlier media reports mentioned that Samsung plans to apply Hybrid Bonding technology to support the production of 4F Square DRAM. Hybrid Bonding is a next-generation packaging technology referring to vertically stack chips to increase cell density and thus improve performance, which will also exert an influence on the development of HBM4 and 3D DRAM.

  • HBM4 on the Horizon

In the era of AI, HBM, particularly HBM3e, has thrived in the memory market, prompting fierce competition among the three major DRAM manufacturers. A new race is now underway, primarily focusing on the next-generation HBM4 technology.

In April of this year, SK Hynix announced a partnership with TSMC to jointly develop HBM4. It is reported that the two companies will first work on performance improvements for the base die fitted at the bottom layer within the HBM package. To focus on the development of next-generation HBM4 technology, Samsung has established a new “HBM Development Team.”

In July, Choi Jang-seok, head of the New Business Planning Group in Samsung Electronics’ memory division, revealed that the company is developing a high-capacity HBM4 memory with a single stack of up to 48GB, expected to go into production next year. Recently, Samsung reportedly plans to use a 4nm advanced process to produce HBM4 logic die. Micron, on the other hand, plans to introduce HBM4 between 2025 and 2027 and transition to HBM4E by 2028.

Aside from manufacturing processes, DRAM manufacturers are actively exploring hybrid bonding technology for future HBM products. Compared to existing bonding processes, hybrid bonding eliminates the need for bumps between DRAM memory layers, instead directly connecting the upper and lower layers, copper to copper. This significantly improves signal transmission speed, better matching the high bandwidth requirements of AI computing.

In April of this year, Korean media outlet The Elec reported that Samsung successfully manufactured a 16-layer stacked HBM3 memory based on hybrid bonding technology, with the memory sample functioning normally. This 16-layer stacked hybrid bonding technology will be used to produce HBM4 at scale in the future. SK Hynix plans to adopt hybrid bonding in its HBM production by 2026. Micron is also developing HBM4 and is considering related technologies, including hybrid bonding, which are all under research at present.

  • The Development of 3D DRAM Picks up Steam

3D DRAM (Three-dimensional dynamic random-access memory) represents a new DRAM technology with a novel memory cell structure. Unlike traditional DRAM, which places memory cells horizontally, 3D DRAM vertically stacks memory cells, greatly increasing storage capacity per unit area and improving efficiency. This makes it a key development for the next generation of DRAM.

In the memory market, 3D NAND Flash has already achieved commercial application, while 3D DRAM technology is still under research and development. However, as AI, big data, and other applications enjoy burgeoning growth, the demand for high-capacity, high-performance memory will surge, and 3D DRAM is expected to become a mainstream product in the memory market.

HBM technology has paved the way for the 3D evolution of DRAM, enabling DRAM to transition from traditional 2D to 3D. However, current HBM cannot be considered as true 3D DRAM technology. Samsung’s 4F Square VCT DRAM is closer to the concept of 3D DRAM, but it is not the only direction or goal for 3D DRAM. Memory manufacturers have more ideas and creativity in 3D DRAM.

Samsung plans to achieve the commercialization of 3D DRAM by 2030. In 2024, Samsung showcased two 3D DRAM technologies, including VCT and stacked DRAM. Samsung first introduced VCT technology, then upgraded to stacked DRAM by stacking multiple VCTs together to continuously improve DRAM capacity and performance.

Samsung states that stacked DRAM can fully utilize the Z-axis space, accommodating more memory cells in a smaller area, with a single chip capacity exceeding 100Gb. In May of this year, Samsung noted that it, along with other companies, successfully manufactured 16-layer 3D DRAM, but emphasized that it is not ready for mass production. 3D DRAM is expected to be produced using wafer-to-wafer hybrid bonding technology, and BSPDN (Backside Power Delivery Network) technology is also considered.

Regarding Micron, industry sources cited by DRAMeXchange reveal that Micron has filed for a 3D DRAM patent application different from Samsung’s, aiming to alter the shape of transistors and capacitors without placing cells.

BusinessKorea reported in June that SK Hynix achieved a manufacturing yield of 56.1% for its 5-layer stacked 3D DRAM. This means that out of around 1000 3D DRAMs produced on a single test wafer, about 561 viable devices were manufactured. The experimental 3D DRAM demonstrated characteristics similar to the currently used 2D DRAM, marking the first time SK Hynix disclosed specific numbers and features of its 3D DRAM development.

Besides, American company NEO Semiconductor is also engaging in the development of 3D DRAM. Last year, NEO Semiconductor announced the launch of the world’s first 3D DRAM prototype: 3D X-DRAM. This technology resembles 3D NAND Flash, namely increasing memory capacity by stacking layers, offering high yield, low cost, and remarkably high density.

NEO Semiconductor plans to launch the first generation of 3D X-DRAM in 2025, featuring a 230-layer stack and a core capacity of 128Gb, which is several times higher than the 16Gb capacity of 2D DRAM.

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(Photo credit: SK Hynix)

Please note that this article cites information from Chosun BizThe Elec, BusinessKorea and WeChat account DRAMeXchange.

2024-07-22

[News] China-US Chip War Escalated as YMTC Sues Micron for Patent Infringement

According to a previous report from Bloomberg, Chinese 3D NAND Flash giant YMTC recently filed a lawsuit against American memory giant Micron in California, accusing Micron of infringing on 11 of its patents related to 3D NAND Flash and DRAM products. YMTC is requesting the court to order Micron to stop selling the infringing memory products in the United States and to pay patent royalties.

Established at the end of 2016 in Wuhan, YMTC is a major Chinese manufacturer of memory (DRAM) and flash memory (NAND Flash), supported by significant investments from the “Big Fund.” It has become a representative enterprise in China’s effort to build a local chip supply chain. However, in October 2022, the U.S. Department of Commerce added YMTC to the Entity List, preventing it from obtaining advanced equipment from U.S. companies to manufacture 3D NAND chips with 128 layers or more.

Before facing U.S. export controls, YMTC’s 128-layer 3D NAND chip products had already entered Apple’s supply chain and received technical and quality certification from Apple. At that time, Apple reportedly hoped to use YMTC’s chips not only for cost considerations but also to prevent flash memory from being overly concentrated in the hands of Samsung, SK Hynix, and Micron.

The report from Tom’s hardware states that YMTC’s current allegations assert that Micron’s 96-layer (B27A), 128-layer (B37R), 176-layer (B47R), and 232-layer (B58R) 3D NAND Flash products, as well as some DDR5 SDRAM products (Y2BM series), infringe on 11 of YMTC’s patents or patent applications filed in the United States.

Notably, last November, YMTC also filed a lawsuit against Micron and its subsidiaries in the U.S. District Court for the Northern District of California, accusing them of infringing on eight U.S. patents related to 3D NAND Flash. Additionally, per a report from South China Morning Post on June 7th of this year, YMTC filed a lawsuit in California, accusing the Denmark-based consulting firm Strand Consult, funded by Micron, of spreading false information that damaged YMTC’s market reputation and business relationships.

Industry sources cited by the Commercial Times also note that in recent years, China’s technological capabilities have significantly improved, and companies have been actively applying for patents domestically and internationally. With the support of the Chinese government, they have also started to frequently engage in patent litigation. Last year, Chinese courts received 5,062 technical intellectual property and monopoly cases.

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(Photo credit: YMTC)

Please note that this article cites information from Bloomberg, Tom’s hardware, South China Morning Post and Commercial Times.

2024-07-17

[Insights] Memory Spot Price Update: DRAM Prices Continue to Rise as Samsung Supports the Momentum

According to TrendForce’s latest memory spot price trend report, DRAM spot prices have finally stabilized as Samsung is committed to propping them up. Spot prices of DDR4 products, in particular, continue the momentum. As for NAND flash, demand for a small extent of inventory replenishment remains possible for 3Q24, which may help the sales performance from the spot market to improve from that of 2Q24. Details are as follows:

DRAM Spot Price:

DRAM spot prices, which had experienced a long period of decline, have finally stabilized as Samsung is committed to propping them up. Spot prices of DDR4 products, in particular, have risen slightly. Additionally, since spot prices are currently lower than contract prices for both DDR4 and DDR5 products, module houses and other buyers prefer spot trading. This, in turn, has helped stabilize spot prices. The average spot price of mainstream chips (i.e., DDR4 1Gx8 2666MT/s) has increased by 0.81% from US$1.979 last week to US$1.995 this week.

NAND Flash Spot Price:

Spot prices have started to stabilize recently as a result of reluctance in truncation from spot traders and module houses, as well as the consideration on how the growth of demand has been exceedingly confined by the drop of prices. Demand for a small extent of inventory replenishment remains possible for 3Q24, when sales performance from the spot market is expected to improve from that of 2Q24. On the whole, spot prices would first maintain equilibrium whilst awaiting for the final development of suppliers’ contract prices and the market status for 3Q24, before deciding on subsequent actions. Spot prices of 512Gb TLC wafers have dropped by 0.58% this week, arriving at US$3.272.

2024-07-16

[News] Samsung’s HBM3e Rumored to be Certified by NVIDIA, Boosting DDR5 Price Increases in Q3

Though Samsung has denied the rumor that its HBM3e passed NVIDIA’s qualification tests, multiple Taiwanese companies in the supply chain reportedly learned that the product is expected to receive certification soon, and will start shipping in Q3. As memory manufacturers are said to shift at least 20-30% of their production capacity to HBM, tightening supply further, DDR5 prices in Q3 will reportedly be on the rise.

It is reported that some of Samsung’s supply chain partners have recently received information to place orders and reserve capacity as soon as possible, which indicates the memory giant’s HBM may begin shipments smoothly in the second half of the year. The move may also imply that the internal capacity allocation within Samsung will accelerate, shifting the focus of production lines to HBM.

Taiwanese memory supply chain sources reportedly believe that the news of Samsung’s HBM certification is likely to be confirmed at the upcoming Samsung financial report meeting, which will take place on July 31. It is said that memory manufacturers will relocate at least 20-30% of their production capacity, driving DDR5 prices to rise.

TrendForce notes that a recovery in demand for general servers—coupled with an increased production share of HBM by DRAM suppliers—has led suppliers to maintain their stance on hiking prices. As a result, the ASP of DRAM in Q3 is expected to continue rising, with an anticipated increase of 8–13%. Due to high average inventory levels of DDR4 among buyers, purchasing momentum will be focused on DDR5.

On the other hand, regarding NAND prices in Q3, TrendForce reports that while the enterprise sector continues to invest in server infrastructure, the consumer electronics market remains lackluster. This, combined with NAND suppliers aggressively ramping up production in the second half of the year, is likely to curb the blended price hike to a modest 5–10%.

According to TrendForce’s latest analysis, Samsung’s initial plan to pass NVIDIA’s certification in Q2 was delayed, making it falling behind SK hynix and Micron. Simultaneously, some HBM suppliers also faced lower-than-expected production yields, leading to concerns about a shortage of HBM3e 8hi materials for the H200 GPU shipments starting in Q2 2024.

However, Samsung adjusted its 1alpha nm front-end production process and back-end stacking process in the first half of 2024, leading the industry to expect that sample production could be completed in Q3 2024, followed by product certification.

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(Photo credit: Samsung)

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