With the United States expected to further restrict China from acquiring advanced GAA (Gate-All-Around) chip architecture capabilities, coupled with reports of poor yield rates in Samsung’s 3nm GAA generation, the semiconductor industry sources cited in a report from Commercial Times state that TSMC’s 3nm FinFET process is enjoying dominance. Reportedly, due to the high demand and limited supply capacity, upstream IC design companies are beginning to report price hikes.

Seven global tech giants, including NVIDIA, AMD, Intel, Qualcomm, MediaTek, Apple, and Google, are set to gradually adopt TSMC’s 3nm process. As per the sources cited in the report from Commercial Times, Qualcomm’s Snapdragon 8 Gen 4, built using TSMC’s N3E process, has seen a price increase of 25% compared to the previous generation, potentially triggering a subsequent trend of price hikes.

Samsung was the first to commence mass production of 3nm chips using the GAA process in June 2022. However, the first-generation N3 node, SF3E, did not achieve significant success and was initially limited to cryptocurrency applications. Subsequently, the yield rate for its own Exynos 2500 chip also fell short of expectations.

Additionally, Google’s Tensor processors, which are manufactured by Samsung, still use Samsung’s 4nm process in their fourth generation. However, it is said in the report that the fifth generation will switch to TSMC’s 3nm process.

In the second half of the year, numerous AI products will be launched in the consumer market. Among the three major players in the mobile chip market, Qualcomm’s Snapdragon 8 Gen 4, MediaTek’s Dimensity 9400, and Apple’s A18 and M4 series will all be built using TSMC’s N3 family. Moreover, Google’s Tensor G5 will also compete in the market.

It is rumored that Qualcomm’s Snapdragon 8 Gen 4 has already initiated the first wave of price increases. The industry sources cited in the report claim that the procurement cost of mobile chips was already high, with last year’s flagship 8 Gen 3 costing around USD 200. This year’s flagship chip might exceed USD 250. Whether competitors will follow suit remains to be seen.

However, industry sources cited by the report also point out that the price increase is within a reasonable range. Compared to the 5nm process, the cost per wafer for the 3nm process is about 25% higher. This increase does not yet take into account overall wafer quantities and design architecture factors.

TSMC President C.C. Wei has also revealed that TSMC products are highly power-efficient and have better yield rates. When considering the cost per chip, TSMC is the most cost-effective.

Read more

• [News] Major Clients Reportedly Fully Allocate TSMC’s Production Capacity Until 2026, 3nm Process in High Demand
• [News] NVIDIA CEO Jensen Huang Supports C.C. Wei’s Theory and Backs for TSMC to Increase Price

(Photo credit: TSMC)

SK hynix, as the market leader in HBM, targets to begin mass production of its GDDR7 chips in the fourth quarter of 2024, the company said on 13th June.

In the meantime, Micron also announced the launch of its GDDR7 graphics memory at Computex, which is currently being sampled. According to AnandTech, Micron not only plans to start mass production for GDDR7 this year, but also aims to do so early enough for some customers to ship finished products by year-end, with major applications range from AI and gaming to high-performance computing.

Samsung, on the other hand, is the first among the Big Three to present its GDDR7 products. According to its press release, Samsung has completed development of the industry’s first GDDR7 DRAM in July, 2023, a 16-gigabit  product, after its development of the industry’s first 24Gbps GDDR6 DRAM in 2022. According to AnandTech, Samsung is already sampling GDDR7 memory with the aim of launching it in 2024.

According to a report from AnandTech, SK hynix already has sample chips available for partners to test. Currently, the company plans to produce both 16Gbit and 24Gbit chips, with data transfer rates of up to 40 GT/s. As Samsung and Micron both expect to begin with 16Gbit chips running at 32 GT/s for their GDDR7 products, whether SK hynix could win customers’ favor by its faster speed attracts attention, AnandTech noted.

Read more

• [News] SK Hynix Reportedly Raises Prices Again, with DRAM Products to Increase by 15-20%
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(Photo credit: SK hynix)

According to sources cited in a report from Reuters, it’s said that IC design giant MediaTek is developing an ARM-based PC chip that will run Microsoft’s Windows operating system.

Last month, Microsoft unveiled a new generation of laptops featuring ARM-based chips, which provide sufficient computing power to run AI applications. Its executives stated that this represents the future trend of consumer computing. MediaTek’s latest development of an ARM-based PC chip is said to be geared toward these types of laptops.

The same report indicates that Microsoft’s move plans to take aim at Apple, which has been using ARM-based chips in its Mac computers for about four years. Microsoft’s decision to optimize Windows using ARM-based chips could further pose a threat to Intel’s long-standing dominance in the PC market.

Regarding this matter, both MediaTek and Microsoft declined to comment.

Reportedly, according to industry sources, MediaTek’s PC chip is scheduled to launch by the end of next year, coinciding with the expiration of Qualcomm’s exclusive agreement to supply chips for laptops. MediaTek’s chip, based on ARM’s existing designs, will significantly accelerate the development process by less design work.

It is currently unclear whether Microsoft has approved MediaTek’s PC chip for supporting the Copilot+ feature in Windows programs.

ARM executives have stated that one of their clients used ready-made components to complete a chip design in about nine months, although this client was not MediaTek. For experienced chip designers, creating and testing advanced chips typically takes more than a year, depending on the complexity.

In the latest press release from TrendForce, MediaTek’s strategy in the PC domain is also highlighted. Reportedly, the Arm chip co-developed by MediaTek and NVIDIA, with adoption of Wi-Fi 7 and 5G, is also slated to occupy a spot in the AI NB market since 2Q25, and initiate a new wave of technical innovation after 2025. According to TrendForce’s forecast, Arm chips are likely to surpass 20% in market penetration at an accelerated velocity in 2025.

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• [News] MediaTek Reportedly Partners with Meta, Entering the Battleground of AI against Apple and Qualcomm
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(Photo credit: MediaTek)

According to TrendForce’s latest memory spot price trend report, China’s 618 shopping festival has limited effects on demand, slowing down the digestion of existing inventory, causing DRAM and NAND Flash spot prices to slide further. However, DDR5 has been performing relatively better than older products such as DDR3 and DDR4 in sales. Details are as follows:

DRAM Spot Price:

Spot prices continue to decline. China’s 618 shopping festival is generating a more significant extent of purchase sentiment regarding smartphones due to huge price slashes, while other end products, having yet to exhibit any signs of recovery in demand, have slowed down the digestion of existing inventory. Generally speaking, DDR5 has been performing slightly better in sales, while older products, such as DDR3/4, are sustaining a larger decrement due to transitions of platforms. Mainstream packaged DDR4 1Gx8 2666MT/s saw a price drop of 0.84% (from US$1.904 to US$1.888) this week.

NAND Flash Spot Price:

Spot prices for NAND Flash are maintaining a slow depletion. The recent 618 e-commerce promotions have proven to be confined in efficacy towards overall market demand, where the enervation seen from transactions of consumer products continues to aggravate the inversion between contract and spot prices. 512Gb TLC wafer spots have dropped by 1.74% this week, arriving at US$3.328.

With high demand for AI chips from major players like NVIDIA and AMD, the capacity for advanced packaging falls short of meeting demand. Industry sources cited in a report from the Economic Daily News indicate that TSMC’s new CoWoS facility in the Southern Taiwan Science Park in Chiayi is now undergoing environmental impact assessments, prompting the commencement of equipment procurement.

Additionally, considering the insufficiency of planned CoWoS facilities in the Chiayi park, TSMC is reportedly sending representatives to survey additional land for potential expansion.

Regarding these developments, TSMC stated on June 11 that they do not comment on market rumors.

With the rapid development of AI applications, the demand for advanced packaging in the chip market has surged. TSMC, serving as the major foundry partner for tech giants like NVIDIA and AMD in AI chip production, has faced continuous high demand for advanced packaging capacity for some time. The company has been actively expanding related capacity and is now venturing into building a new CoWoS facility in the Southern Taiwan Science Park in Chiayi.

According to the information previously announced by the Chiayi County government, TSMC’s advanced packaging facility will occupy approximately 20 hectares in the Southern Taiwan Science Park, with the first facility covering around 12 hectares. The first advanced packaging fab is expected to be completed by the end of 2026, creating 3,000 job opportunities. TSMC initially plans to build two advanced packaging facilities in the area.

According to official information from TSMC, its backend test and packaging facilities include the Hsinchu Advanced Backend Fab 1, Southern Taiwan Science Park Advanced Backend Fab 2, Longtan Advanced Backend Fab 3, Central Taiwan Science Park Backend Advanced Fab 5, and Miaoli Zhunan Advanced Backend Fab 6.

Industry sources cited by the same report from the Economic Daily News further indicate that advanced packaging-related equipment is currently being gradually supplied to TSMC’s Zhunan, Central Taiwan, and Southern Taiwan fabs, with shipments to the Chiayi facility expected to commence from the third quarter of next year.

TSMC Chairman C.C. Wei previously mentioned that despite their efforts to increase capacity, the strong demand from customers has led to an insufficient supply, which has led to outsourcing to specialized packaging and testing foundries. He emphasized TSMC’s ongoing expansion of CoWoS advanced packaging capacity, with the goal of doubling their in-house capacity growth this year and continuing efforts into next year to narrow the gap between supply and demand.

TSMC has integrated its advanced packaging-related technologies into the “3DFabric” platform, allowing customers to select and configure according to their needs. The front-end technologies include System on Integrated Chip (SoIC), while the back-end assembly and testing technologies include Integrated Fan-Out (InFO) and the CoWoS series family.

In June 2023, TSMC announced the official opening of its Advanced Backend Fab 6 located in the Zhunan Science Park, becoming its first fully automated advanced packaging and testing facility to realize integrated front-end to back-end processes and testing services under the 3DFabric platform.

Source: TSMC

Read more

• [News] Major Clients Reportedly Fully Allocate TSMC’s Production Capacity Until 2026, 3nm Process in High Demand
• [News] NVIDIA CEO Jensen Huang Supports C.C. Wei’s Theory and Backs for TSMC to Increase Price

(Photo credit: TSMC)