News
South Korean patent management company Mimir IP, which acquired approximately 1,500 chip-related patents from SK hynix in May, has filed a complaint against Micron, accusing the US memory giant of infringing on its chip-related patents, the Korea Economic Daily reported. Sources suggested that if Mimir wins the case, the damages could amount to as much as USD 480 million.
The Korea Economic Daily learned that the lawsuit, filed on June 3, also targets four other companies that use Micron products: Tesla, Dell, HP, and Lenovo, while the patents involved are reportedly related to circuits, voltage measurement devices, and non-volatile memory devices.
The case has been filed with both the US District Court for the Eastern District of Texas and the US International Trade Commission (ITC), which marks the first instance of a Korea-based non-practicing entity (NPE) that acquired patents from domestic chipmakers filing a suit against a US semiconductor company.
Officials from the involved parties were unavailable for comment, the report said.
SK hynix, the current market leader in HBM, has been facing heated competition from Samsung and Micron, both of which have recently developed their HBM3e chips, trying to win favor from the world’s leading AI chip designer, NVIDIA. Now it seems that the battleground for industry dominance is expanding from technology competition to patent disputes.
It is worth noting that transferring patents to non-practicing entity (NPE) has become more and more popular, as it seems to be a preliminary measure for companies to prepare for legal disputes with its competitors, the report noted.
The Big Three in the memory industry have made similar moves on their patent strategy recently. According to the report, Micron transferred over 400 chip-related patents to Lodestar Licensing Group in March, 2023, followed by Samsung, which transferred 96 US chip patent rights, including the right to file patent infringement complaints, to IKT, an affiliate of Samsung Display, in June 2023.
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(Photo credit: SK hynix)
News
Recently, Korean SSD controller manufacturer FADU announced a partnership with Western Digital to co-develop the next-generation enterprise SSD technology called “FDP (Flexible Data Placement).”
FDP is a standard technology proposed by the Open Compute Project (OCP) and is a newly approved NVMe specification (TP4146) initiated by companies such as Samsung, Meta, and Google. It aims to reduce write amplification while simplifying the integration of the entire software ecosystem.
According to a report from WeChat account DRAMeXchange, this technology not only enhances SSD performance but also significantly extends SSD lifespan.
By markedly reducing the phenomenon of “Write Amplification,” FDP can improve SSD write performance by 2 to 3 times and optimize data placement within SSD storage space. This phenomenon, when the recorded data volume is much larger than the actual client data volume, will greatly extend SSD lifespan, making it a highly regarded technological innovation in massive data exchange environments of large-scale data centers.
Founded in 2015, FADU is a fabless startup primarily developing advanced NAND flash technologies to meet the explosive growth of data storage needs in hyperscale, enterprise, and cloud data centers. FADU is committed to producing high-performance SSD controllers and designing chips for data centers.
FADU aims to increase its market share in the SSD controller field to 30% by 2026. FADU’s CEO, Jihyo Lee, stated at an IPO briefing in July 2023 that global data centers used 50 million SSD controllers at that time, and the demand might double to 100 million in the next 2-3 years.
As a globally renowned memory manufacturer, Western Digital achieved revenues of USD 1.71 billion in 1Q24, a 2.4% increase from the previous quarter. However, due to a limited product line, Western Digital’s revenue in the Enterprise SSD sector for the quarter was USD 133 million, only up by 18.1% QoQ.
It’s worth noting that in 2Q24, the overall consumer market not yet recovers and the outlooks for PC and smartphone market for the year are conservative. Against this backdrop, Western Digital intends to accelerate Enterprise SSD product development to expand future growth momentum.
Western Digital is also aggressively pursuing shipments of high-capacity storage products, with plans to mass-produce 162-layer QLC SSDs. To accelerate the production of PCIe 5.0 SSDs, the company is collaborating with third-party controller manufacturers, breaking its tradition of in-house IC development. This strategic move underscores Western Digital’s efforts to expand its product range and support steady growth in enterprise SSD revenue.
For this collaboration, FADU and Western Digital predict that widespread adoption of FDP technology will not only help bring down total cost of ownership (TCO) but also establish a new standard for memory efficiency.
Amidst the AI wave, the importance of high-capacity, high-performance storage products is becoming increasingly prominent. HBM is undoubtedly the most sought-after product currently, with demand outbalancing supply and market value continuously rising. Meanwhile, new memory technologies are constantly emerging, heralding the coming of an era of 3D DRAM. Besides, SCM potential is about to be unleashed, and PCIe 6.0/7.0 is poised to be launched.
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(Photo credit: WD)
News
Taiwanese panel company Innolux have said to be involving in collaborating with leading global memory manufacturers. According to a report from the Economic Daily News, plans are underway to repurpose its 4th Plant in Tainan (5.5-generation LCD panel plant) for AI-related semiconductor applications, specifically targeting back-end packaging.
Sources cited in the report indicate that, based on the strategies of the top three global memory manufacturers, the partner in this collaboration is likely a memory manufacturer that already has a presence in Taiwan and seeks to expand its capacity there. Innolux’s advantage lies in its advanced panel-level fan-out packaging (FOPLP), which is poised to make a substantial impact in the AI field. However, these reports have not been confirmed by Innolux or any global memory giants.
Regarding the 4th Plant developments at Tainan, Innolux stated on June 16 that, based on flexible strategic planning principles, the company continues to optimize production configurations and enhance overall operational efficiency. Some production lines and products are being adjusted to streamline and strengthen the group’s layout and development.
The surge in AI demand has driven the need for advanced chip heterogenous integration and high-end packaging technologies to meet the high-performance application requirements of AI devices. Targeting these opportunities, Innolux has reportedly repurposed its Tainan 3.5-generation and 4-generation LCD panel production lines for semiconductor-related uses, including FOPLP and X-ray sensors.
Sources cited in the report also revealed that Innolux’s transformation efforts are making progress. After closing the 5.5-generation LCD panel production at the 4th Plant last year, the company has gradually reassigned staff to other facilities. To revitalize capacity and assets, Innolux has been in close contact with leading global memory manufacturers, aiming to develop AI-related applications.
Currently, the three major global memory manufacturers are actively developing high-bandwidth memory (HBM) for AI servers. South Korea’s SK Hynix is the most proactive in collaborating with Taiwanese companies. SK Hynix has partnered with TSMC to aggressively target the AI market. As per a report from Korean media outlet The Korea Herald, SK Group Chairman Chey Tae-won recently visited TSMC Chairman C.C. Wei to ensure continued close cooperation on the next-generation HBM.
On the other hand, Micron has established memory production in Taiwan but does not yet have HBM capacity for AI servers in the region. Meanwhile, Samsung does not have direct AI cooperation with Taiwanese companies in the memory sector.
Sources cited in the report from Economic Daily News indicate that Innolux is engaging with one of these three major international memory manufacturers, focusing on new semiconductor applications. As Innolux is advancing into the promising glass substrate packaging business through panel-level fan-out packaging, this technology is expected to be combined with memory applications for AI development. Therefore, the developments at its 4th Plant in Tainan are receiving considerable attention.
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(Photo credit: Innolux)
News
According to a report from Nikkei, Japanese memory manufacturer Kioxia has ended production cuts amidst a recovery in the memory market and has secured new bank credit support. The company’s plants in Yokkaichi, Mie Prefecture, and Kitakami, Iwate Prefecture, have restored their production lines to 100% capacity, focusing mainly on NAND flash production.
With improved business conditions, creditor banks have reportedly agreed to refinance a maturing loan of JPY 540 billion (roughly USD 3.43 billion) and have established a new credit line totaling JPY 210 billion (roughly USD 1.33 billion).
Kioxia had previously implemented production cuts in October 2022 due to sluggish demand for smartphone products, reducing output by over 30%. The planned launch of new production lines at the Kitakami plant, originally scheduled for 2023, has been postponed to 2025.
The improved market environment is reflected in Kioxia’s financial report for January to March 2024, where the company achieved a net profit of JPY 10.3 billion, ending six consecutive quarters of losses. Demand for smartphone and personal computer chips has bottomed out and is starting to recover, while orders related to data centers have increased.
As per a previous TrendForce report, Kioxia’s Q1 output was still affected by production cuts from the previous quarter, resulting in a modest 7% QoQ increase in shipments. However, rising NAND Flash prices led to a 26.3% QoQ rise in revenue to $1.82 billion. Kioxia expects to grow Q2 revenue by approximately 20%, supported by increased supply bits and more flexible pricing, which will further expand enterprise SSD shipments.
Per the same report from Nikkei, led by a banking consortium including Sumitomo Mitsui Banking, Mitsubishi UFJ Financial Group, and Mizuho Bank, Kioxia’s improved performance has led to relaxed loan terms and agreement on refinancing along with new credit limits. Additionally, the banks will assist in funding for equipment upgrades.
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(Photo credit: Kioxia)
Press Releases
In 2023, Samsung disclosed plans to launch its advanced three-dimensional (3D) chip packaging technology, which would be able to integrate memory and processors needed for high-performance chips, in much smaller sizes. Now, at the Samsung Foundry Forum in San Jose taken place in June, the tech giant made it public that it would introduce 3D packaging services for HBM within this year, according to the latest report by The Korea Economic Daily.
For now, HBM chips are predominantly packaged with 2.5D technology. Citing industry sources as well as personnel from Samsung, the company’s 3D chip packaging technology is expected to hit the market for HBM4, the sixth generation of the HBM family.
Samsung’s announcement regarding its 3D HBM packaing roadmap has been made after NVIDIA CEO Jensen Huang revealed Rubin at COMPUTEX 2024, the company’s upcoming architecture of its AI platform after Blackwell. The Rubin GPU will reportedly feature 8 HBM4, while the Rubin Ultra GPU will come with 12 HBM4 chips, targeting to be released in 2026.
Currently, Samsung’s SAINT (Samsung Advanced Interconnect Technology) platform includes three types of 3D stacking technologies: SAINT S, SAINT L, and SAINT D.
SAINT S involves vertically stacking SRAM on logic chips such as CPUs, while SAINT L involves stacking logic chips on top of other logic chips or application processors (APs). SAINT D, on the other hand, entails vertical stacking of DRAM with logic chips like CPUs and GPUs.
The Korea Economic Daily noted that unlike 2.5D technology, under which HBM chips are horizontally connected with a GPU on a silicon interposer, by stacking HBM chips vertically on top of a GPU, 3D packaging could further accelerate data learning and inference processing, and thus does not require a silicon interposer, a thin substrate that sits between chips to allow them to communicate and work together.
It is also understood that Samsung plans to offer 3D HBM packaging on a turnkey basis, according to the Korea Economic Daily. To achieve this, its advanced packaging team will vertically interconnect HBM chips produced by its memory business division, with GPUs assembled for fabless companies by its foundry unit, the report noted.
Regarding Samsung’s long-time rival, TSMC, the company’s Chip on Wafer on Substrate (CoWoS) has been a key enabler for the AI revolution by allowing customers to pack more processor cores and HBM stacks side by side on one interposer. TSMC also made similar announcement in May, reportedly utilizing 12nm and 5nm process nodes in manufacturing HBM4, according to a report by AnandTech.
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(Photo credit: Samsung)