According to a report by Nikkei News, SK Hynix is considering expanding its investment to Japan and the US to increase HBM production and meet customer demand.

Reportedly, the demand for high-bandwidth memory (HBM) is surging thanks to the AI boom. SK Group Chairman and CEO Chey Tae-won stated at the Future of Asia forum in Tokyo on May 23rd that if overseas investment becomes necessary, the company would consider manufacturing these products in Japan and the United States.

Chey Tae-won also mentioned that SK will further strengthen its partnerships with Japanese chip manufacturing equipment makers and materials suppliers, considering increased investments in Japan. He emphasized that collaboration with Japanese suppliers is crucial for advanced semiconductor manufacturing.

When selecting chip manufacturing sites, Chey highlighted the importance of accessing clean energy, as customers are demanding significant reductions in supply chain greenhouse gas emissions.

Additionally, Chey stated that SK intends to enhance R&D collaboration with Japanese partners for next-generation semiconductor products.

Kwon Jae-soon, a senior executive at SK Hynix, stated in a report published by the Financial Times on May 21 that the yield rate of their HBM3e is approaching the 80% target, and the production time has been reduced by 50%.

Kwon emphasized that the company’s goal this year is to produce 8-layer stacked HBM3e, as this is what customers need the most. He noted that improving yield rates is becoming increasingly important to maintain a leading position in the AI era.

SK Hynix’s HBM capacity is almost fully booked through next year. The company plans to collaborate with TSMC to mass-produce more advanced HBM4 chips starting next year.

Read more

• [News] Reasons for Samsung’s HBM Chips Failing Nvidia Tests Revealed, Reportedly Due to Heat and Power Consumption Issues
• [News] HBM Boom May Lead to DRAM Shortages in the Second Half of the Year

(Photo credit: SK Hynix)

According to Bloomberg, mega economies like the US and the EU have invested tens of billions of dollars in the research and mass production of next-generation semiconductors, and notably, this is only the initial amount of funding already received.

Meanwhile, South Korea and Japan have also joined the “subsidy race” for chips. With substantial investments continuously pouring into the semiconductor industry, global chip competition will intensify.

• Korea to Allocate USD 19 Billion to Support Chip Industry

On May 23, Korea announced a comprehensive support plan for semiconductor industry, with an investment of up tp KRW 26 trillion (~ USD 19 billion). This plan intends to provide large-scale financing support and rev up investments in the construction of semiconductor parks and various infrastructures, and the cultivation of research and development personnel, involving companies include chip manufacturers, raw material suppliers, and chip design companies.

The core of this plan is a financing support project by the Korea Development Bank, valued at KRW 17 trillion (~USD 12.4 billion), specifically for semiconductor infrastructure investment. Additionally, Korea will extend tax concession for chip investment to ensure the smooth progress of semiconductor supercluster investment.

Semiconductor is a vital industry for Korea’s economic growth. In response to substantial subsidies for chip industry from the US and EU, Korea is actively promoting the development of its local chip industry.

In January 2024, Korea launched the “World’s Largest and Best Semiconductor Supercluster Construction Plan,” proposing an investment of KRW 622 trillion (~USD 454 billion) by 2047, which is to build 16 new plants, inclusive of R&D facilities, and construct “Semiconductor Supercluster”in semiconductor-intensive cities such as Pyeongtaek, Hwaseong, Yongin, Icheon, and Suwon in southern Gyeonggi Province. It’s estimated that the chip production capacity will reach 7.7 million wafers per month by 2030.

• Europe to Draw in EUR 100 Billion in 2030

Recently, an EU Commission official revealed that the “European Chips Act” is expected to help the European semiconductor industry attract more than EUR 100 billion (~USD 108 billion) in funding by 2030.

The official also stated that the EU Commission plans to complete reviewing the support plan of four advanced semiconductor pilot lines by September and is planning another pilot line for silicon photonics chip with an unspecified investment scale.

The “European Chips Act” officially came into effect in September 2023, aiming to increase the EU’s share of the global semiconductor market from the current 10% to at least 20% by 2030. The act promises to allocate EUR 43 billion (~USD 46.4 billion) in subsidy funds, with EUR 11 billion (~USD 11.8 billion) for the development of advanced process chip technology.

Industry sources indicate that Europe’s two largest chip projects are located in Germany. Germany plans to provide USD 20 billion in subsidies to increase chip production, of which around 75% will go to Intel and TSMC.

Intel is projected to invest over EUR 30 billion (~USD 33 billion) in building a wafer plant in Magdeburg, Germany, with an expected government subsidy of nearly  USD 11 billion. TSMC plans to build its first European factory in Germany, which will also receive government subsidies. Recent media reports indicate that efforts in establishing this factory is proceeding as planned, with construction expected to begin in the fourth quarter of 2024.

• Japan to Raise USD 25.3 Billion for Chip Sector

To enhance semiconductor R&D and production capabilities, Japan is also providing massive subsidies in the semiconductor field, including taking in foreign investment to build factories and strengthening local state-of-the-art process R&D and production.

It’s reported that since Japan formulated the “Semiconductor and Digital Industry Strategy” in June 2021, the Ministry of Economy, Trade, and Industry has raised approximately USD 25.3 billion for its chip industry, involving companies like TSMC and Rapidus.

In February, TSMC’s Kumamoto plant officially opened, marking TSMC’s first factory in Japan (Fab 23). The total production capacity will reach 40-50Kwpm  wafers per month, focusing on 22/28nm processes and a small part on 12/16nm, paving the way for the main process of the second Kumamoto plant.

In April, Japan approved a subsidy of up to USD 3.9 billion for Rapidus, a domestic semiconductor manufacturing company to mass-produce 2nm chips by 2027.

In addition to wafer foundries, Japan is also spotlighting memory industry. Previously, the Ministry of Economy, Trade, and Industry announced a subsidy of JPY 242.9 billion (~USD 1.546 billion) for Kioxia and Western Digital to build two advanced NAND flash memory chip production plants in Mie and Iwate Prefectures, attempting to meet the demands from AI and big data center markets. The joint venture plants will produce 218-layer 3D NAND chips.

• The US to Offer USD 29 Billion to TSMC, Samsung and Intel

The US “CHIPS and Science Act” was introduced in August 2022, providing USD 52.7 billion for chip research, development, manufacturing, and workforce development in the US, and offering a 25% investment tax credit for capital expenditures on manufacturing chips and related equipment.

It’s reported recently that since December 2023, the US has allocated about USD 29 billion in subsidies to companies such as Samsung, TSMC, Intel, and Micron. These chip manufacturers have pledged to invest approximately USD 300 billion in current and future chip manufacturing projects in the US.

In April, Micron, Samsung, and TSMC received US funding subsidies. Micron will establish two new chip manufacturing plants in upstate New York and Boise, Idaho (Its headquarter), with a fund of USD 6.14 billion. Samsung will build a plant covering leading logic, R&D, and advanced packaging in Taylor, Texas, and expand the production of mature process nodes in Austin, Texas, with a fund of USD 6.4 billion. TSMC is developing three cutting-edge wafer plants in Phoenix, Arizona, receiving USD 6.6 billion in subsidies.

Previously, Microchip Technology and Intel also secured USD 162 million and USD 8.5 billion in funding, respectively. Intel’s USD 8.5 billion is the largest single subsidy provided under the CHIPS Act to date, with which Intel will advance its commercial chip projects in Arizona, New Mexico, Ohio, and Oregon.

Read more

• [News] South Korea Reportedly Unveils USD 19 Billion Semiconductor Subsidy to Boost R&D and Infrastructure Investment
• [News] US Allocates USD 39 Billion Subsidy to Semiconductor Industry for Establishing Plants

(Photo credit: Intel)

This May, we have witnessed two different approaches to the new High-NA EUV (high-numerical aperture extreme ultraviolet) lithography equipment between semiconductor giants. Intel has secured the first batch of High-NA EUV kits from ASML, which will allegedly be used on its 18A (1.8nm) and 14A (1.4nm) nodes. On the other hand, TSMC stated that the company will not utilize this new lithography technology in its upcoming A16 (1.6nm) process.

High-NA EUV machines may be critical for companies aiming to produce chips beyond 2nm, but are they must-have?

Looking back in history, the industry used to believe that when the U.S. prevented EUV exports to China, the act would limit China’s progress in 7nm. However, China’s largest foundry, SMIC, is rumored to produce 5-nm chips for Huawei this year, without the need for EUV lithography machines.

When examining TSMC’s trajectory on EUV itself, it is worth mentioning that the company took a more cautious stance, as well. When Samsung began using EUV in its 7nm process in 2018, TSMC successfully launched its first 7nm production line using mature DUV lithography.

It was not until the stability and maturity of EUV had been confirmed that TSMC started to use EUV in its N7+ process, which took place in 2019. In the end, in spite of Samsung’s early adoption of EUV, yield issues allowed TSMC to overtake them.

Similarly, in the race for the 3nm process, unlike Samsung, instead of rushing to adopt GAAFET, TSMC chose the reliable FinFET route.

Will history repeat itself? Now it would be a good timing to examine TSMC’s strategy on High-NA EUV machines.

High-NA EUV technology: A Cure for All?

According to a report by China’s Jiwei, at the recent 2024 North America Technology Symposium hosted by TSMC, the company revealed that its A16 process would not require the next-generation High-NA EUV lithography machines, with mass production expected in 2026.

An expert cited by Jiwei stated that TSMC’s decision might be due to the higher risk associated with High-NA lithography machines.

The report noted that there would be still quite a few challenges to be resolved, such as supporting light sources for photon shot noise and productivity requirements, solutions for the 0.55 NA’s small depth of focus, computational lithography capabilities, mask manufacturing, and computing infrastructure including new materials. Not to mention there is the necessary debugging and development time to ensure stability, which implies considerable time and hidden costs.

On the other hand, TSMC began to adopt EUV in its N7+ process in 2019, implying the world’s largest chipmaker has committed plenty of time and effort to refine the technology.

According to the report by Jiwei, by optimizing the EUV exposure dose and the photoresist used, as well as improving photomask life, increasing yield, and reducing defect rates, TSMC has achieved significant advancements. Today, the number of EUV lithography machines has increased tenfold, while wafer output nowadays is 30 times that of 2019.

Weigh Between Cost and Technology

In addition to potential technology bottlenecks, higher cost may be another problem. Per a report from Bloomberg, TSMC’s Senior Vice President of Business Development and Co-Chief Operating Officer, Dr. Kevin Zhang, remarked that while he appreciates the capabilities of High-NA EUV, he finds its price tag to be unlikeable.

As per the same report from Bloomberg, ASML’s new High-NA EUV machine is priced at EUR 350 million (roughly USD 380 million). Jiwei further stated the unit price may more than double, comparing with the current EUV machines (roughly EUR 170 million).

Market demand would be another major concern. Citing an industry insider, Jiwei analyzed that the cost of manufacturing chips with High-NA lithography machines increases significantly. While more chips can be cut from each wafer, more chips need to be sold to recoup the investment.

The report stated that the smartphone AP chip market alone cannot absorb these cost without the supporting demand of AI chips. However, as China, the largest market for AI, is now being restricted by export control measures from the U.S., the overall market demand remain uncertain.

Adoption Timing for High-NA EUV? TSMC May Not Be in a Hurry

Then what would be the right timing for TSMC to adopt High-NA EUV?

The report by Jimwei took the trajectory of EUV as an example. When the industry generally regarded EUV essential in the 7nm node, TSMC successfully launched its first 7nm production line using mature DUV lithography. This strategy allowed TSMC to avoid the imperfections and high costs of EUV lithography at that time.

TSMC waited until 2019 to start the usage of EUV in its N7+ process when the technology has become mature enough. In the end, in spite of Samsung’s early adoption of EUV, yield issues allowed TSMC to win the favor of clients.

Similarly, in the race for the 3nm process, instead of rushing to adopt GAAFET, TSMC chose the reliable FinFET route. Despite Samsung’s early lead with 3nm, their low yields and repeated delays enabled TSMC to surpass them.

TSMC’s previously announced roadmap indicates that the 1.4nm A14 process is expected to be introduced between 2027 and 2028, while the development of the 1nm A10 process is projected to be completed before 2030. The report by Jiwei suggested that TSMC might consider using the next-generation lithography machine only after the 1nm process is in place, potentially adopting the High-NA EUV system around 2029 to 2030.

Read more

• [News] How Costly is the High-NA EUV? TSMC Reportedly Shocked, Considering Not Using the Equipment in its A16 Nodes
• [News] Intel to Adopt New High-NA EUV, High Costs Could Lead to Increased Losses

(Photo credit: ASML)

In response to US export bans, NVIDIA, the global leader in AI chips, has commenced to sell H20, its AI chip tailored for the Chinese market earlier this year. However, an oversupply caused the chip to be priced lower than its rival, Huawei, in some cases even at an over 10% discount, according to the latest report by Reuters.

The US Department of Commerce restricted the export of NVIDIA AI chips to China due to concerns about their potential military use in late 2022. In response, NVIDIA has repeatedly reduced product performance to comply with US regulations. The H20 chip, derived from the H800, is specifically designed as a ‘special edition’ for the Chinese market.

However, due to the abundant supply in the market, citing sources familiar with the matter, Reuters noted that H20 chips are being sold at a discount of over 10% compared to Huawei’s Ascend 910B, the most powerful AI chip from the Chinese tech giant.

The chip is reportedly to be sold at approximately 100,000 yuan per unit, while Huawei 910B sold at over 120,000 yuan per unit.

The decreasing prices underscore the difficulties NVIDIA encounters in its China operations amid U.S. sanctions on AI chip exports and rising competition from local rivals.

According to a previous report by The Information, major tech companies such as Alibaba, Baidu, ByteDance, and Tencent have been instructed to reduce their spending on foreign-made chips like NVIDIA’s, according to sources cited by the media outlet.

(Photo credit: Huawei)

According to a report from CNA, the South Korean government has announced a comprehensive support plan for the semiconductor industry, amounting to KRW 26 trillion (roughly USD 19 billion). The plan includes substantial financial support, expansion of semiconductor parks, infrastructure development, and investment in R&D and talent cultivation, aimed at revitalizing the economy and improving livelihoods.

Reportedly, South Korean President Yoon Suk Yeol chaired the second economic review meeting, where this semiconductor industry support plan was unveiled. The centerpiece of the plan is a KRW 17 trillion financial support program provided by the Industrial Bank of Korea, designed to alleviate potential funding challenges that companies may face when constructing new factories, production lines, and equipment.

The tax reduction incentives, originally set to expire this year, is said to be extended, allowing semiconductor companies to partially offset their R&D and equipment investment costs against income taxes. Yoon stated that the Tax reduction incentives encourage companies to expand their investments, benefiting not only the companies themselves but also creating more quality job opportunities.

He emphasized that over 70% of the support will be directed towards small and medium-sized enterprises (SMEs), rather than just large corporations. Yoon further expressed that as the economy grows, tax cuts will actually generate more tax revenue.

Additionally, a KRW 1 trillion semiconductor ecosystem fund will be established to support smaller semiconductor SMEs with specialized technologies in wafer design, materials, components, and equipment, helping them to become world-class enterprises.

President Yoon also instructed to expedite the construction of semiconductor mega-parks and pledged cooperation with various government agencies to accelerate the resolution of infrastructure needs such as electricity, water, and external roads for the industry.

Particularly concerning the critical issue of power supply affecting yield rates, the government will intensify communication with the parliament to expedite the passage of a special law regarding grid use, which can significantly shorten the construction time for power transmission lines.

Investments in infrastructure are expected to exceed KRW 2.5 trillion, with the construction time for industrial parks projected to be reduced from 7 years to 3.5 years. Additionally, there is a plan to allocate KRW 5 trillion for manpower development from 2025 to 2027, a significant increase from the KRW 3 trillion allocated from 2022 to 2024.

President Yoon pointed out that the future success of the semiconductor industry hinges on system semiconductors, which account for two-thirds of the overall market.

Therefore, the government must collaborate with businesses to propose groundbreaking initiatives to enhance the competitiveness of system semiconductors, ensuring a dominant position in the international market. This comprehensive support plan is expected to be formally implemented shortly after finalization, potentially as early as mid-June.

As per a report from the Korean media outlet TheElec, a semiconductor fund initially planned at 300 billion won has been expanded to KRW 1.1 trillion. The original 7-year construction plan for the semiconductor cluster will be halved, according to South Korea’s Deputy Prime Minister Choi Sang-mok.

The remaining portion of the KRW 26 trillion investment will reportedly be dedicated to fostering researchers in the semiconductor field. South Korean chipmakers Samsung and SK Hynix welcomed the announcement, emphasizing the need for ongoing government support.

Read more

• [News] South Korea Reportedly Plans to open AI Chip Center in San Jose
• [News] South Korea Reportedly Pushes for KRW 10 Trillion Investment Plan to Strengthen Semiconductor Industry Position

(Photo credit: Samsung)