Amid industry slowdown, customers are reducing orders as they are currently clearing inventory accumulated over the past two years due to semiconductor supply constraints. Thus, Tower Semiconductor reportedly plans a three-week shutdown for most of its operations in Newport Beach, California, per Data Center Dynamics. Nearly 700 employees will take leave during this period.

Tower Semiconductor has reportedly confirmed the shutdown from April 1st to 7th and plans further closures from July 1st to 7th and October 7th to 13th. The same sources further states that most of Tower Semiconductor’s 699 employees will be impacted by three week-long furlough periods. The total number of employees at the Newport Beach facility was not disclosed by the company.

As IJIWEI cited sources, the management of Tower Semiconductor has announced that equipment will remain in “warm shutdown,” and power to unused areas of the plant will be shut off.

In contrast to the shutdown, the company has listed 13 job vacancies, including positions such as equipment engineers, electrical engineering interns, industrial engineering interns, and directors of aerospace and defense sales.

While Tower Semiconductor’s sales are far behind those of Intel and TSMC, it produces components for major clients like Broadcom and holds a significant position in rapidly growing fields like electric vehicles.

Recent reports from Bloomberg have also indicated that Tower Semiconductor has proposed a USD 9 billion investment to establish a facility in India. The report further cites that Tower Semiconductor aims to expand its operations over the next decade, with the ultimate goal of producing 80,000 wafers per month.

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• [News] India Enters Chip War with USD 21 Billion Semiconductor Investment Proposals

(Photo credit: Tower Semiconductor)

Geopolitical factors are driving countries to actively establish semiconductor manufacturing locally and offer subsidies. According to TSMC’s annual report, subsidies received from Japan and China amounted to NTD 47.545 billion in 2023, signaling a 5.74-fold increase from the previous year, reaching a record high. In contrast, the report also suggest the subsidies from the US government have yet to materialize.

TSMC did not specify the individual amounts of subsidies from the Japanese and Chinese governments. However, estimations cited by the report suggest that the Japanese government, aiming to revitalize the semiconductor industry, subsidized TSMC’s Kumamoto plant with up to JPY 476 billion, likely serving as the primary driver behind the substantial increase in TSMC’s subsidies in 2023.

The construction of TSMC’s Kumamoto Fab began in April 2022, with full assistance from the Japanese central and local governments. Recently, the opening ceremony was held, and trial production has commenced, with mass production expected in the fourth quarter of this year.

The subsidies from the Japanese and Chinese governments to TSMC are mainly used to subsidize the costs of real estate, buildings, and equipment purchases, as well as some of the costs and expenses associated with building construction and production operations.

On the other hand, TSMC’s US fab began construction in early 2021, with a grand tool-in ceremony held in December 2022, attended by the US President. Initially planned to invest USD 12 billion, the facility aims to build a N5 process fab with a monthly capacity of 20,000 wafers. Construction was scheduled to commence in 2021, with mass production slated to begin by the end of 2024, creating approximately 1,600 job opportunities in the local area.

However, it was previously reported by the TechNews that due to the delay in the first phase’s production timeline from the end of 2024 to the first half of 2025, the production schedule for the second phase will also be postponed to start after 2027. Subsequently, the production schedule has been pushed from this year to next year.

Despite the US government’s declaration to reinvigorate manufacturing and the introduction of the “CHIPS Act,” totaling USD 52 billion in subsidies, only three US companies have been subsidized so far.

These include BAE Systems, Microchip, and the third-largest foundry, Global Foundries, with Global Foundries receiving the most substantial subsidy of USD 1.5 billion. As of now, subsidies for TSMC have yet to be finalized.

• [News] TSMC’s Kumamoto Plant – Semiconductor Bubble or Once-in-a-Century Opportunity?
• [News] Latest Overview on TSMC’s Global Expansion Initiatives

(Photo credit: TSMC)

In response to the high demand for AI chips, TSMC has once again initiated a large-scale expansion in northern, central, and southern Taiwan. This expansion includes the first tool-in and the construction of 2-nanometer fabs and advanced packaging plants.

Industry sources cited by the Liberty Time News have suggested that investing in eight to ten facilities may be necessary for the next-generation 1-nanometer technology in Taiwan.

Hot Demand for AI Chips Sparks Ongoing Installation and Production

As per the report citing industry sources, last year, TSMC’s pace of building factories in Taiwan slowed down due to the downturn in the semiconductor industry. However, with the industry’s recovery this year and the high demand for AI chips, expansion efforts in the north, central, and southern regions have become more active.

In April, first tool-in will be commenced at the Baoshan 2-nanometer plant (Fab 20) in the Hsinchu Science Park. Additionally, the 2-nanometer plant (Fab 22) in Kaohsiung is under construction, with plans for a third plant underway. TSMC’s 2-nanometer process is scheduled for mass production in 2025.

AI chips, emphasizing computational power, universally adopt advanced processes. The surge in demand for AI chips is driving the need for advanced packaging technologies like CoWoS.

Currently facing overwhelming demand, TSMC is expanding its advanced packaging facilities in Zhunan, Central and Southern Taiwan Science Park, with plans to start tool-in and join production lines this year. The advanced packaging facility in Chiayi is also commencing construction this year.

Generation of One-Nanometer Fabrication Plants: 8-10 Facilities Needed

According to the report from Liberty Time News citing sources, Intel’s construction of fab typically takes about five to six years. On the other hand, TSMC’s construction and first tool-in in Taiwan are estimated to be completed within two years.

With a monthly installation capacity of 200 units per month for a two-nanometer plant, TSMC reportedly plans to advance to 1.4-nanometer and 1-nanometer advanced processes after the two-nanometer.

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(Photo credit: TSMC)

On March 4th, Chinese assembly and testing company, JCET Group (JCET), announced its intention to acquire 80% equity of SanDisk Semiconductor Shanghai Co., Ltd. (SDSS), a subsidiary of Western Digital Corporation (WDC), for USD 624 million in cash. This strategic move aims to expand JCET’s market share in the storage.

The assembly and testing market competition is intensifying, especially with Moore’s Law slowing down in recent years. While advanced process technology still requires time, the demand for computing is skyrocketing.

As a result, advanced packaging is highly anticipated. Over the past two years, several testing and packaging giants have continuously enhanced their market competitiveness through mergers, expansion, and innovative technologies.

JCET Ventures into Storage with CNY 4.5 Billion Investment

According to the announcement, JCET has signed a “Equity Acquisition Agreement” with SANDISK CHINA LIMITED, the parent company of SANDISK CHINA LIMITED – SSDS.

Per the agreement, JCET Group intends to acquire 80% of the equity of SSDS held by the seller in cash. The transaction price, after full communication and negotiation between the parties, is approximately USD 624 million. After the completion of this transaction, JCET Group will hold 80% of the equity of SSDS, while SANDISK CHINA LIMITED will retain 20% ownership in SSDS.

According to the information available, SSDS was established in August 2006 and primarily engages in the research and development, packaging, and testing of advanced NAND Flash memory. Its product range includes iNAND flash modules, SD cards, MicroSD memory cards, etc., widely used in mobile communications, industrial IoT, automotive, smart home, consumer electronics, and other fields.

The selling party’s parent company, WDC, is a global leader in storage solutions. According to TrendForce’s data, in the third quarter of 2023, Western Digital held a market share of 16.9% in global NAND Flash revenue rankings, securing the third position worldwide.

Per the announcement, WDC has had a long-standing partnership with JCET since 2003, making it one of JCET’s key clients. JCET stated that following the completion of this transaction, the selling party (SANDISK CHINA LIMITED) and its parent company (Western Digital) will continue to be the primary or sole customers of SSDS for a certain period, ensuring a level of stability in its operational performance.

In its announcement of the acquisition of SSDS, JCET explicitly states that this decision stems from an in-depth analysis and forward-looking assessment of the global storage market.

As per the World Semiconductor Trade Statistics (WSTS), storage chips have emerged as the second-largest semiconductor sub-market, capturing approximately 28% of market share, trailing only behind logic chips. Looking ahead, it is projected that by 2024, the storage chip market will reach a staggering USD 130 billion in size.

Within this expansive market, NAND flash chips stand out, constituting approximately 40% of the global storage market. Moreover, it is projected to maintain a compound annual growth rate (CAGR) of 8% from 2021 to 2027. This indicates that the NAND flash chip market is not only vast but also possesses stable growth potential.

Intense Competition in the Semiconductor Packaging Market: Focus on Advanced Packaging

Major semiconductor packaging companies like ASE, Amkor Technology, Powertech, and Huatian Technology are continuously enhancing their competitive edge through expansions and acquisitions, driving rapid growth in the semiconductor packaging industry.

• ASE

Regarding ASE, it recently announced that its capital expenditure for this year is expected to increase by 40% to 50% compared to last year, with 65% allocated to packaging, especially for advanced packaging projects.

On February 22nd, ASE Group and semiconductor giant Infineon Technologies jointly announced the finalization of an agreement. ASE Group will invest EUR 62.589 million to acquire Infineon’s backend packaging facilities located in Cavite, Philippines, and Cheonan, South Korea.

In November 2022, ASE initiated construction on its fourth and fifth plants in Penang, Malaysia, with completion slated for 2025. Besides Malaysia, ASE continues its expansion efforts in Taiwan, including Kaohsiung, Zhongli, and Tanzi.

• Amkor

On January 16th, Amkor and semiconductor foundry Globalfoundries held a ribbon-cutting ceremony for the joint construction of the Amkor Porto plant in Portugal. Since February 2023, Globalfoundries has relocated 50 devices from its Dresden facility to Amkor’s new Porto plant.

The initial batch of client products has been certified using Globalfoundries’ equipment. Globalfoundries is transferring some of its 300mm production lines from Dresden to Amkor’s Porto facility, which is IATF16949 certified, to establish Europe’s first large-scale test and packaging plant.

• Powertech

In 2023, the packaging and testing firm, Powertech, expressed optimism about the future development of advanced packaging technologies. Powertech has outlined plans to resume significant capital expenditures in the latter half of 2024, ensuring sustained investments to maintain a competitive edge and prepare for long-term growth.

• Huatian Technology

In March 2023, Huatian Technology made significant strides by investing 2.858 billion yuan in its wholly-owned subsidiary, Huatian Technology (Jiangsu) Co., Ltd., for the construction of the “High-Density, High-Reliability Advanced Packaging Research and Industrialization” project.

Once completed, the project will enable an annual wafer-level integrated circuit packaging capacity of 840,000 pieces for Bumping, 480,000 pieces for WLCSP, and 26,000 pieces for ultra-high-density fan-out UHDFO. The construction period spans 5 years, from June 2023 to June 2028.

Currently, the packaging market’s competitive landscape extends beyond traditional OSATs, with major foundries and storage giants actively joining the fray. Technologies like TSMC’s SoIC, CoWoS, and InFO, Intel’s EMIB, Foveros, and Co-EMIB, as well as Samsung’s I-Cube (2.5D) and X-Cube (3D), are emerging and maturing.

The proliferation of various 2.5D and 3D packaging solutions indicates that competition in advanced packaging will only intensify, promising an exciting future ahead.

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• [News] NVIDIA and AMD Clash in AI Chip Market, as TSMC Dominates Orders with Strong Momentum in Advanced Processes
• [News] NVIDIA’s H100 AI Chip No Longer Out of Reach, Inventory Pressure Reportedly Forces Customers to Resell

(Photo credit: JCET Group)

AMD has encountered resistance from the United States when attempting to sell a custom-designed AI chip to the Chinese market, according to Bloomberg citing sources.

The same source further revealed that AMD sought approval from the U.S. Department of Commerce to sell this AI chip to Chinese customers. The chip’s performance is lower than AMD’s products sold in other regions of China, and its design complies with U.S. export restrictions.

However, U.S. officials informed AMD that the chip’s performance is still too robust, requiring the company to obtain approval from the U.S. Department of Commerce’s Bureau of Industry and Security before sales can proceed. It remains unclear whether AMD is currently seeking a license.

The U.S. government introduced initial export control measures in 2022 and bolstered a series of measures in October 2023, encompassing additional technologies and reforming potential sales that could undermine intermediary countries/regions.

The strict limitations on the sale of NVIDIA’s chips specifically designed for China align with the initial export regulations from 2022. Subsequently, the company developed new customized but lower-capacity products for the Chinese market, aligning with the restrictions imposed by the United States in 2023.

The U.S. ban in 2022 prevented both NVIDIA and AMD from selling their most powerful artificial intelligence chips to China. When the restrictions took effect in 2022, AMD anticipated that they would not substantially affect its operations.

While AMD has not publicly discussed its development of new AI chips for China, NVIDIA, on the other hand, immediately introduced improved products with reduced performance.

NVIDIA is set to commence pre-orders for its AI chip H20 specially designed for the Chinese market by the end of March this year in response to US export bans, according to sources cited by a report from STAR Market Daily.

Still, AMD is now actively expanding into the AI chip market. In December 2023, it launched the new MI300 series, challenging NVIDIA’s chips. According to sources cited by Bloomberg’s report, this customized product for China is known as the MI309. It is still unclear which Chinese customer wishes to purchase AMD’s AI chips, which could affect the company’s authorization.

Read more

• [News] NVIDIA and AMD Clash in AI Chip Market, as TSMC Dominates Orders with Strong Momentum in Advanced Processes
• [News] NVIDIA’s H100 AI Chip No Longer Out of Reach, Inventory Pressure Reportedly Forces Customers to Resell

(Photo credit: AMD)