According to a report from Economic Daily News, while the industry is still focusing on the launch of Apple’s new products featuring self-developed M4 chips, Apple is reportedly making significant investments in the development of its next-generation M5 chips, to strengthen its position in the AI PC competition with more powerful ARM architecture processors.

Notably, the report highlighted that Apple will continue to adopt TSMC’s 3nm process, increasing orders for TSMC’s advanced processes. According to the report, it is expected that the next-generation M5 chip will be launched as early as the second half of next year to the end of the year.

In the current wave of AI PC competition, tech giants in the x86 camp, such as Intel and AMD, have launched new processors to vie for market share. Meanwhile, Apple, the market leader in the Arm camp, is accelerating its efforts to expand its presence and continue to develop next-generation self-developed chips, as indicated by the report.

According to the report, citing industry sources, Apple’s upcoming M5 chip is expected to deliver enhanced AI performance and computing power, potentially triggering a new wave of iPhone purchases. The report indicated that this will generate substantial chip foundry orders for TSMC. Plus, it will also benefit Apple’s end-product partners, such as Foxconn and Quanta.

Regarding Apple’s decision not to use TSMC’s 2nm process for the M5, the report, citing industry sources, noted that this is primarily due to the high costs. However, compared to the M4, the M5 features significant advancements, as it will utilize TSMC’s 3D chip-stacking technology, known as SoIC. This approach allows for better thermal management and reduced leakage compared to traditional 2D designs, as the report pointed out.

Apart from using TSMC’s 3nm process for chip development, the report noted, citing industry sources, that Apple has actively placed orders for TSMC’s 2nm process and the first batch of production capacity of the A16 process.

According to the report, The 2nm process is expected to be introduced as early as next year in the APs for Apple’s iPhone 17 Pro and 17 Pro Max models. As for the rumored ultra-thin iPhone 17 Air model, its AP may continue to use the 3nm process family.

Regarding clients for the 2nm process, the report noted, citing comments from TSMC’s chairman C.C. Wei during a previous earnings call, that inquiries for the 2nm process are outpacing those for the 3nm process. Additionally, the A16 process is considered highly attractive for AI server applications.

Wei noted that high-performance computing (HPC) applications are increasingly moving toward chiplet designs; however, this shift will not impact the adoption of the 2nm process. According to the report, current customer demand for the 2nm process exceeds that of the 3nm process, and production capacity is expected to be higher, as the report indicated.

According to an industrial source cited by MoneyDJ, TSMC started the mass production of 3nm in 2022, while the 2nm is expected to enter volume production in 2025, indicating that the generation cycle for a node has been expanded to three years.

Thus, supported by TSMC’s major clients, the contribution from 3nm will continue to rise next year and remain a key revenue driver in 2026, while the 2nm process is expected to replicate or even surpass the success of 3nm, MoneyDJ notes. According to previous market speculations, tech giants such as Apple, NVIDIA and AMD are believed to be the first batch of TSMC’s 2nm customers.

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• [News] TSMC Says 2nm More Sought after than 3nm; A16 Attractive for AI Server Clients
• [News] TSMC’s 2nm Wafers Reportedly Set to Double in Price, Benefitting IP/ Material Companies

(Photo credit: Apple)

According to a report from Globes, amid significant layoffs at Intel, many former employees from the company in Israel have made the move to NVIDIA, including veteran staff who have worked at Intel for a decade or more.

The report noted that updates on LinkedIn indicate that at least 30 employees left Intel in 2024 to join NVIDIA’s offices in Yokneam and Tel Aviv. This group includes core processor development engineers, hardware architecture professionals, electric power management staff, and chip design software developers.

Currently, NVIDIA is undergoing a major expansion in Israel, having hired hundreds of employees from other companies and recent college graduates since the beginning of the year, as the report mentioned.

According to the report, NVIDIA is estimated to have hired between 60 and 90 former Intel employees in recent months. With Intel’s ongoing wave of voluntary retirements and layoffs, NVIDIA is likely to hire a dozen more, potentially bringing the total to around 100.

The report indicated that, according to Levels.fyi, NVIDIA offers higher salaries and better compensation packages—approximately 33% higher on average than at Intel. Notably, the biggest difference between Intel and NVIDIA lies in their share options. The report pointed out that, according to Levels.fyi, the annual value of the share option package for a hardware engineer at Intel starts at NIS 19,300 (around USD 5,187), while at NVIDIA it begins at NIS 56,200 (approximately USD 15,105).

Intel announced in August that it would reduce 15% of its workforce, estimated to be between 15,000 and 17,000 employees, while 7,500 have already opted for voluntary retirement, which includes 19 additional monthly salary payments, according to the report.

Regarding Intel’s situation in Israel, the report indicated that after thousands of employees were laid off in the U.S., several hundred employees at Intel’s development centers in Haifa, Petah Tikva, and Jerusalem are reportedly set to be laid off this week.

The report highlighted that most of Intel’s layoffs in Israel are occurring in the development centers, rather than at the production facility in Kiryat Gat. This is due to the construction of the new Fab 38 plant, which, once completed, will need more production staff.

According to the report, most of former Intel employees who joined NVIDIA this year made the move in recent months, with a noticeable increase in departures occurring this month. As for other former Intel employees in Israel, many have joined other major tech companies, including Apple, Amazon, and Mobileye, which is a subsidiary of Intel. The report also noted that a smaller number have transitioned to Microsoft, Google, and the Chinese company Huawei, which has a development center in Haifa.

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• [News] Intel Employees Prepare for Layoff Notices as Cuts Enter Peak Phase This Week

(Photo credit: NVIDIA)

Taiwan’s semiconductor manufacturing is making strides in advanced process and packaging expansion. TSMC’s new 2nm fab in Kaohsiung will hold a tool-in ceremony this November, followed by equipment installations in December. Meanwhile, ASE’s Siliconware Precision Industries is set to expand advanced packaging capacity in the Erlin Science Park.

According to the Liberty Times, TSMC’s first 2nm fab in Kaohsiung’s Nanzih District is nearing completion. Industry sources indicate that TSMC has scheduled a low-profile tool-in ceremony with equipment suppliers on November 26, led by COO Y.P. Chyn, with equipment installations to begin on December 1. The Nanzih site is expected to serve as TSMC’s primary base for 2nm production.

The report also highlights the rapid progress at TSMC’s Nanzih facility. The P1 fab is nearing completion, with the office tower and P2 fab structure already in place, while groundbreaking for a third fab (P3) occurred this month. Industry insiders note that a fourth and fifth fab (P4 and P5) have received environmental approvals and could serve as wafer production sites for TSMC’s A16 process under the 2nm generation.

Key equipment suppliers, including Lam Research, ASML, and Tokyo Electron, have begun establishing presences in Kaohsiung to support this next-generation fab.

In related developments, ASE Technology announced on October 28 that its subsidiary Siliconware Precision Industries will invest NTD 419 million to secure land-use rights in the Erlin Science Park. According to a report from the Commercial Times, industry sources indicate this acquisition is primarily to expand CoWoS (Chip-on-Wafer-on-Substrate) advanced packaging capacity.

TSMC CEO C.C. Wei noted earlier in its third quarter earnings call that CoWoS advanced packaging capacity remains constrained. TSMC has committed to doubling CoWoS capacity by year-end and will continue expanding in 2025 to better align supply with demand. However, due to ongoing capacity limitations, the Commercial Times reported that TSMC stated the capacity shortfall had led them to expand outsourcing to OASTs, seeking support from industry partners.

(Photo credit: TSMC)

As HBM has become a key battlefield for memory giants amid the AI wave, NAND chips with more layers, which are also ideal for high-capacity solid-state drives (SSDs) used in AI data centers, are in great demand as well. According to the latest report by the Korea Economic Daily, Samsung aims to introduce the 400-layer vertical NAND by 2026 to capture a leading position in the booming AI-driven storage market.

According to the Korean media outlet, following Samsung’s current mass production of its 286-layer V9 NAND flash chips, the company’s Device Solutions division is targeting the production of vertical NAND with a minimum of 400 stacked layers as early as 2026.

Samsung’s major rival, SK hynix, is also developing 400-layer NAND, aiming to get the technology ready for mass production by the end of 2025, according to a report by etnews in August. The current HBM leader reportedly eyes the full-scale production for the 400-layer NAND to begin in the first half of 2026, which is roughly similar to Samsung’s timetable.

Samsung Develops “Dream NAND for AI” to Boost Density Per Unit Area by 1.6 Times

The report by the Korea Economic Daily notes that in conventional NAND chips, memory cells are stacked above the peripheral circuitry, which acts as the chip’s brain. However, stacking beyond 300 layers has frequently caused damage to the peripheral.

Back in 2013, Samsung was the industry’s first to introduce V NAND chips with vertically stacked storage cells to maximize capacity, the report notes.

Now, to address the issue occurred, Samsung is reportedly developing its advanced 10th-generation V NAND (V10), in which it intends to use an innovative bonding technology where cells and the peripheral circuitry are manufactured separately on distinct wafers before being bonded together.

Named by Samsung as bonding vertical NAND Flash or BV NAND, the technology is also praised by Samsung as the “dream NAND for AI,” stating that it will boost bit density per unit area by 1.6 times, according to the Korea Economic Daily.

This method is expected to support “ultra-high” NAND stacks by offering substantial storage capacity and efficient heat dissipation, which is ideal for SSDs used in AI data centers.

Roadmap for 1,000-layer NAND Revealed

Samsung is indeed ambitious as it also reveals the long-term roadmap for NANDs with more layers. According to the Korea Economic Daily, it plans to advance its stacking technology with the launch of V11 NAND in 2027, featuring a 50% increase in data input and output speed. Moreover, executives cited by the report state that the memory giant also aims to develop NAND with over 1,000 layers by 2030.

According to TrendForce’s latest research, in the second quarter of 2024, Samsung maintained its global leadership in the NAND Flash market with a 36.9% market share, up 0.2% from the previous quarter. SK Group followed with a 22.1% share, down 0.1%. Other key players include Kioxia (13.8%), Micron (11.8%), and Western Digital (10.5%).

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• [News] SK hynix Reportedly Develops NAND over 400 Layers, Eyeing Mass Production Ready by 2025
• [News] Outpacing Samsung or the End of Race? Kioxia Aims 1000-layer NAND by 2027

(Photo credit: Samsung)

TSMC has recently been implicated in a controversy surrounding Huawei’s Ascend 910B chip, which was reportedly manufactured by TSMC. According to Reuters, Huawei placed its chip orders through a proxy, Chinese firm Sophgo.

Although Sophgo quickly issued a statement on its website denying any connection with Huawei, TechNews cited industry sources suggesting that Huawei has exploited proxy firms like Sophgo to bypass U.S. sanctions. These sources say the chips are ordered by a third party, shipped back to China, then split and advanced-packaged to create AI processors.

In the same report, an anonymous semiconductor industry insider revealed that the 910B chip was previously paired with HBM2E memory but was found this time in a variant containing TSMC’s 7nm HPC chip. Huawei reportedly uses proxy companies to obtain TSMC-manufactured chips, bringing them back to China for IC splitting and advanced heterogeneous packaging into AI chips.

This time, the proxy was none other than Sophgo, the firm revealed in Reuters’ initial report. In response, Sophgo emphasized on its website that it has no direct or indirect business dealings with Huawei and that it complies with U.S. export control regulations.

However, according to a TMTPOST report, public records show that the legal representative for Xiamen Sophgo Technologies Co., Ltd., is Zhao Hong’ai, with around 30% ownership. After multiple layers of shareholder tracing, Bitmain co-founder Micree Zhan is revealed to still own over 20% of Sophgo.

Bitmain, Sophgo’s parent company, reportedly had ties with Huawei in its early years and hired former Huawei employees as legal representatives and executive directors when Sophgo first launched, indicating close connections between the two companies.

TechNews reports that Huawei’s use of proxies to secure advanced semiconductor processes through major foundries has been an open secret in the industry. Huawei’s drive to develop these chips is part of its AI ambitions.

Although Huawei’s Ascend series currently cannot compete with NVIDIA in computing power, it is understood that advanced packaging using heterogeneous integration offers greater flexibility in wafer manufacturing orders. This approach also allows Huawei to more easily outsource wafer production through proxies, bypassing U.S. restrictions and achieving significant gains in AI chip performance.

(Photo credit: Huawei)