As AI-related semiconductors has been driving the demand of High Bandwidth Memory (HBM), the NAND flash market now also feels the vibe. According to industry sources cited by Business Korea, the NAND Flash market competition is intensifying, while memory giants Samsung and SK Hynix are ramping up their efforts to improve the performance and capacity of NAND products.

In April, Samsung confirmed that it has begun mass production for its one-terabit (Tb) triple-level cell (TLC) 9th-generation vertical NAND (V-NAND), boasted to improve the bit density by about 50% compared to the 8th-generation V-NAND, with the number of layers reaching 290, according an earlier report by The Korea Economic Daily.

Based on the report on May 20 by Business Korea, Samsung intends to dominate the AI SSD market with its 9th Generation V-NAND, targeting the development and sampling of ultra-high capacity 64 terabyte (TB) SSDs in the second quarter.

In mid-May, Samsung even revealed the target to release advanced NAND Flash with over 1000 layers by 2030. According to an earlier report by Wccftech, the South Korean memory giant plans to apply new ferroelectric materials on the manufacturing of NAND.

On the other hand, the current HBM3 supply for NVIDIA’s H100 solution is primarily met by SK Hynix, leading to a supply shortfall in meeting burgeoning AI market demands. After establishing its leadership in HBM, it is reported that SK Hynix now aims to dominate the AI memory market in NAND as well, according to Business Korea.

It is worth noting that SK Hynix recently achieved a breakthrough with the development of “Zoned UFS 4.0” (ZUFS 4.0), an on-device AI mobile NAND solution tailored for AI-capable smartphones, which is scheduled to start mass production in the third quarter, according to TheElec.

(Photo credit: Samsung)

According to a report from global media Reuters, the Indian software company Zoho plans to invest USD 700 million in the chip manufacturing sector.

Founded in 1996 and currently headquartered in Tamil Nadu, India, Zoho provides software and related services to businesses across 150 countries.

Zoho is considering the production of compound semiconductors and is seeking incentives from the Indian government. The proposal is currently being reviewed by the committee responsible for promoting India’s chip initiative under the Ministry of Electronics and Information Technology.

Compound semiconductors are semiconductor materials composed of two or more different elements. Compared to traditional silicon (Si) semiconductors, compound semiconductors generally boast higher electron mobility, wider bandgap, and better thermal stability and radiation resistance. These properties make them suitable for applications that require high speed, high frequency, high temperature, and high efficiency. Compound semiconductor materials abound, among which silicon carbide (SiC) and gallium nitride (GaN) are representatives. Currently, both materials are sought-after in consumer electronics and EV markets.

In recent years, India has actively promoted chip assembly and local production as a way of becoming a key player in global semiconductor market. The industry source points out that India’s chip initiative aims to strengthen the country’s position and competitiveness in global semiconductor industry through increased investment, international cooperation, infrastructure development, and talent cultivation.

In February 2024, India approved a semiconductor manufacturing investment plan totaling INR 1.26 trillion (USD 15.2 billion), covering wafer fabrication and chip packaging sectors, inclusive of India’s first fab, a collaboration between Tata Group and Powerchip.

The plant is expected to produce 50,000 wafers per month, covering multiple mature nodes including 28nm, 40nm, 55nm, 90nm, and 110nm. The goal is to produce 3 billion chips annually for various segments, such as high-power computing, EV, telecommunication, and power electronic.

Read more

• [News] 12-Inch Wafer Capacity Construction Going Full Steam
• [News] PSMC Collaborates with Tata to Establish India’s First Fab

(Photo credit: iStock)

Intel’s early adoption of ASML’s High Numerical Aperture Extreme Ultraviolet Lithography (High-NA EUV) equipment is seen by many as a crucial move for Intel to reclaim its technological leadership. Yet, according to a report from CNA, industry sources cited in the report have warned that the high cost of High-NA EUV could lead Intel to face the dilemma of expanding losses.

As Intel secures High-NA EUV equipment, the Korean media outlet TheElec reported that ASML plans to manufacture five High-NA EUV equipment this year, all of which have been booked by Intel. TSMC’s decision to continue using existing EUV equipment for its A16 process, rather than adopting High-NA EUV, has drawn significant attention and sparked lively discussion.

Per a report from Reuters, Intel CEO Pat Gelsinger has acknowledged that the previous decision to oppose using ASML’s EUV equipment was a mistake, which hampered the profitability of Intel’s foundry business. He stated that, with the adoption of EUV equipment, Intel is now highly competitive in terms of price and performance. There is widespread interest in whether Intel’s early adoption of High-NA EUV equipment will help it regain its position as a technology leader.

On the other hand, TSMC plans to mass-produce its A16 technology by 2026, combining nanosheet transistors with a supertrack architecture, garnering attention from the industry.

Ray Yang, the consulting director at Industry, Science and Technology International Strategy Center of ITRI (Industrial Technology Research Institute), stated that TSMC’s decision not to adopt High-NA EUV equipment for the A16 process was likely made after a comprehensive evaluation.

Yang mentioned that TSMC is undoubtedly aware of the benefits that High-NA EUV equipment can bring. However, given the high costs, TSMC has chosen to meet its customers’ diverse needs through other means.

According to ASML, High-NA EUV equipment increases the numerical aperture from 0.33 to 0.55, providing higher-resolution imaging capabilities. This improvement enhances precision and clarity, simplifies the manufacturing process, reduces production time, and boosts production efficiency.

During a technical symposium in Amsterdam on May 14th, TSMC’s Senior Vice President of Business Development and Co-Chief Operating Officer, Dr. Kevin Zhang, remarked that ‘I like the high-NA EUV’s capability, but I don’t like the sticker price.’

Each EUV system from ASML costs around USD 180 million, while High-NA EUV equipment is priced at USD 380 million, more than double the cost of EUV.

Ray Yang noted that the importance of advanced semiconductor packaging is increasing and will play a crucial supporting role. He argued that Intel’s rush to acquire High-NA EUV equipment is a case of choosing the wrong battlefield and weapon because High-NA EUV equipment is not the sole decisive factor for future success.

Ray Yang stated that as the global leader in semiconductor foundry services, TSMC has numerous customers, a comprehensive ecosystem, and ample capital. If customers demand and are willing to pay higher prices, TSMC will undoubtedly adopt High-NA EUV equipment.

Yang noted that TSMC is taking a cautious approach to adopting High-NA EUV equipment, likely after thoroughly considering its necessity. If Intel makes significant purchases of High-NA EUV equipment, its future capacity utilization will be worth observing, as it might face the risk of increased losses.

Currently, both TSMC and Samsung utilize EUV equipment for manufacturing, covering TSMC’s 7nm, 5nm, and 3nm processes and Samsung’s EUV Line (7nm, 5nm, and 4nm) located in Hwaseong, Korea, along with the 3nm GAA process.

Read more

• [News] How Costly is the High-NA EUV? TSMC Reportedly Shocked, Considering Not Using the Equipment in its A16 Node
• [News] Intel Secures First Batch of High-NA EUV Equipment from ASML, Ahead of Samsung and SK Hynix

(Photo credit: ASML)

The recovery in demand for PCs and smartphones will take time, leading to a halt in the upward trend of DRAM prices, remaining stable for two consecutive months. However, the rapid growth in demand for High Bandwidth Memory (HBM), essential for data center servers and generative AI, is expected to boost future DRAM prices as the production trend of HBM rises.

The Nikkei News reported on May 18th that the recovery in demand for PCs and smartphones will take time, leading to a halt in the upward trend of DRAM prices used in smartphones, PCs, and data center servers for temporary data storage.

In April 2024, the wholesale price (bulk transaction price) of the benchmark product DDR4 8Gb was around USD 1.95 per unit, and the price of the smaller capacity 4Gb product was around USD 1.50 per unit, both remaining unchanged from the previous month (March 2024) and marking the second consecutive month of stability.

As of February 2024, DRAM prices had risen for four consecutive months. DRAM wholesale prices are negotiated between memory manufacturers and customers monthly or quarterly. Reportedly, approximately 50% of DRAM demand comes from PCs and servers, while around 35% comes from smartphones.

The report indicated that the demand for HBM, essential for generative AI, is rapidly increasing, and market expectations for the production trend of HBM are expected to boost future DRAM price increases.

A source cited in the report, which is an Electronic product trader, noted that some major manufacturers have accepted the memory manufacturers’ price hike requests. A PC manufacturer source cited by the report also stated that DRAM wholesale prices from April to June are expected to rise by 5-10% compared to January to March.

Another source cited by the report stated that the facilities required to produce HBM are approximately three times larger than those needed for producing general DRAM. If HBM production increases, the production volume of other DRAMs will decrease, thereby driving up prices. Another source cited in the report stated that supply cannot keep up with demand, and pricing power is currently in the hands of memory manufacturers.

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• [News] Samsung and SK Hynix Urgently Reallocate 20% of DRAM Production Capacity to Support Rising HBM demand
• [News] Three-way Contest for HBM Dominance, Uncertainties Surrounding China’s Supply Chain Involvement

(Photo credit: SK Hynix)

As the era of AI advances, following NVIDIA’s application to the Ministry of Economic Affairs (MOEA) for the “A+ Industrial Innovative R&D Program,”  which led to the establishment of the first R&D center in Asia and the creation of Taiwan’s largest AI supercomputer, “Taipei-1”, American AI chip giant AMD is set to follow suit.

According to a report from UDN, AMD plans to invest NTD 5 billion (roughly USD 155 million) to establish an R&D center in Taiwan and intends to apply for the A+ Industrial Innovative R&D Program from the MOEA, highlighting Taiwan’s critical role in AI chip design and manufacturing.

The MOEA has confirmed that AMD applied for the A+ Industrial Innovative R&D Program subsidy at the end of 2023. However, the funding for the program has already been exhausted. Therefore, funds must be allocated in the fifth phase of the A+ Industrial Innovative R&D Program, with the science and technology budget to be set for 2025.

This budget allocation must be approved by the new government administration. Additionally, MOEA officials stated that AMD must submit a concrete plan and gain approval from a review committee established by the Industrial Technology Department of the MOEA.

Previously, the MOEA’s substantial subsidies to global companies under the A+ Industrial Innovative R&D Program sparked mixed reactions within the industry. Some prominent local IC design companies criticized the MOEA, arguing that supporting global companies leads to competition against local businesses and drains valuable local R&D talent.

To avoid controversy, the MOEA has set forth four specific requirements for AMD.

First, they hope AMD will collaborate with Taiwanese IC design companies. Second, any AI servers developed should be manufactured in Taiwan. Third, at least 20% of the R&D workforce should be sourced from abroad, and high-level executives should be stationed in Taiwan. Fourth, AMD should partner with Taiwanese universities to cultivate talent jointly. The MOEA reports that AMD’s response has been very positive, and a thorough review of the application will take place in the second half of the year.

To date, the MOEA’s A+ Industrial Innovative R&D Program has approved subsidies only for two global companies, Micron and NVIDIA, providing them with NTD 4.722 billion (USD 146.48 million) and NTD 6.7 billion (USD 207.8 million), respectively. The MOEA believes this strategy helps solidify Taiwan’s competitive edge in the global semiconductor and AI sectors.

Read more

• [News] Qualcomm Commits to USD 700 Million Investment in Taiwan Over 5 Years in Settlement with Fair Trade Commission
• [News] AI Chip Alone Can’t Hold Up? AMD’s Fiscal Forecast This Quarter Reportedly Falls Short of Expectations

(Photo credit: AMD)