In the intense battle of AI chips between NVIDIA and AMD this year, AMD’s MI300 has entered mass production and shipment 1H24, gaining positive adoption from clients. In response, NVIDIA is gearing up to launch upgraded AI chips. TSMC emerges as the big winner by securing orders from both NVIDIA and AMD.

Industry sources have revealed optimism as NVIDIA’s AI chip shipment momentum is expected to reach around 3 million units this year, representing multiple growth compared to 2023.

With the production ramp-up of the AMD MI300 series chips, the total number of AI high-performance computing chips from NVIDIA and AMD for TSMC in 2024 is anticipated to reach 3.5 million units. This boost in demand is expected to contribute to the utilization rate of TSMC’s advanced nodes.

According to a report from the Economic Daily News, TSMC has not commented on rumors regarding customers and orders.

Industry sources have further noted that the global AI boom ignited in 2023, and 2024 continues to be a focal point for the industry. A notable shift from 2023 is that NVIDIA, which has traditionally dominated the field of high-performance computing (HPC) in AI, is now facing a challenge from AMD’s MI300 series products, which have begun shipping, intensifying competition for market share.

Reportedly, the AMD MI300A series products have commenced mass production and shipment this quarter. The central processing unit (CPU) and graphics processing unit (GPU) tile are manufactured using TSMC’s 5nm process, while the IO tile use TSMC’s 6nm process.

These chips are integrated through TSMC’s new System-on-Integrated-Chip (SoIC) and Chip-on-Wafer-on-Substrate (CoWoS) advanced packaging technologies. Additionally, AMD’s MI300X, which does not integrate the CPU, is also shipping simultaneously.

Compared to NVIDIA’s GH200, which integrates CPU and GPU, and the H200, focusing solely on GPU computation, AMD’s new AI chip performance exceeds expectations. It offers a lower price and a high cost-performance advantage, attracting adoption by ODMs.

In response to strong competition from AMD, NVIDIA is upgrading its product line. Apart from its high-demand H200 and GH200, NVIDIA is expected to launch new products such as B100 and GB200, utilizing TSMC’s 3nm process, by the end of the year.

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(Photo credit: NVIDIA)

Intel recently announced that it has acquired the market’s first ASML Extreme Ultraviolet (EUV) exposure equipment with a 0.55 Numerical Aperture (High-NA), aiming to advance its chip manufacturing technology in the coming years. In contrast, TSMC appears to be taking a more cautious approach, currently showing no urgency to join the race for this next-generation exposure technology.

The High-NA EUV exposure equipment obtained by Intel will initially be used for learning and mastering the technology, with plans to implement it in the Intel 18A process node in the next two to three years. 

Industry sources suggest that unlike Intel’s plan to introduce High-NA EUV and GAA transistors simultaneously in the Intel 18A process technology, it is anticipated that TSMC may not adopt this technology until the 1.4nm (A14) node, possibly in 2030 or later.

According to a report from IThome, in fact, Intel’s proactive development roadmap includes implementing the RibbonFET gate-all-around (GAA) transistor architecture and PowerVia backside power delivery technology starting from the Intel 20A process.

Subsequently, further optimizations are expected in the Intel 18A process, followed by the adoption of High-NA EUV exposure equipment in subsequent process nodes after Intel 18A. These advancements is anticipated to achieve lower power consumption, higher performance, and smaller chip sizes.

In addition, Intel plans to introduce pattern shaping starting from the 20A process, followed by the adoption of High-NA EUV after the 18A node. This approach is expected to reduce the complexity of the manufacturing process and avoid the use of EUV double patterning.

However, some professionals in the industry have stated that, at least in the initial stages, the cost of High-NA EUV may be higher than that of Low-NA EUV. Furthermore, High-NA EUV lithography equipment present a series of specific challenges too, including a halving of the exposure area.

These are two of the reasons why TSMC is currently adopting a cautious approach. TSMC tends to favor the use of cost-effective mature technologies to ensure product competitiveness.

In fact, If we look back at the development of EUV technology, TSMC began using EUV exposure equipment in chip production as early as 2019, a few months later than Samsung but several years ahead of Intel. Currently, Intel is expected to take the lead in the High-NA EUV field ahead of Samsung and TSMC to gain a certain technological and strategic advantage, increasing its appeal to customers.

Therefore, whether TSMC can maintain its leading position in process technology, especially if it adopts High-NA EUV exposure machines later than competitors, remains subject to ongoing observation.

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(Photo credit: ASML)

In order to comply with new regulations on the export of chips to the United States, NVIDIA has been consistently releasing AI chips and graphics cards tailored for the Chinese market.

However, according to sources cited by The Wall Street Journal, since November 2023, major cloud service provider (CSP) in China such as Alibaba and Tencent have been testing samples of NVIDIA’s special chips. These Chinese enterprises have conveyed to NVIDIA that the quantity of chips they plan to order in 2024 will be significantly lower than their initial plans.

According to a report from The Wall Street Journal, in October 2023, the United States announced new regulations preventing NVIDIA from selling advanced AI chips to China. However, NVIDIA swiftly developed a “special edition” chip for China, allowing them to continue selling chips in the Chinese market without violating regulations.

Nevertheless, NVIDIA is facing another challenge: major Chinese CSPs are not actively purchasing the “downgraded” performance versions of the chips.

Chinese enterprises have been testing the highest-performance version, H20, of NVIDIA’s “special edition” AI chips. Some testers have mentioned that this chip enables efficient data transfer among multiple processors, making it a better choice than domestic alternatives for building chip clusters required for processing AI computational workloads.

However, testers also indicate that they need more H20 to compensate for the performance gap compared to previous NVIDIA chips, which increases their costs.

The report indicates that in the short term, the performance advantage of NVIDIA’s “downgraded” chips over domestic Chinese products is diminishing, making Chinese-made chips increasingly attractive to buyers.

Informed sources cited from the report suggest that major players like Alibaba and Tencent are redirecting some advanced semiconductor orders to domestic companies and relying more on internally developed chips. This trend is also observed with the other two major chip buyers, Baidu and ByteDance.

Looking ahead in the long term, Chinese customers are uncertain about NVIDIA’s ability to continue supplying them with chips, as U.S. regulatory authorities have committed to regularly reviewing chip export controls, potentially tightening restrictions on chip performance further.

From the perspective of China’s efforts in the independent development of AI chips, TrendForce previously highlighted in its press release that Chinese CSPs like Baidu and Alibaba are actively investing in autonomous AI chip development.

Baidu developed its first self-researched ASIC AI chip, Kunlunxin, in early 2020, with its second generation scheduled for mass production in 2021 and the third expected to launch in 2024. Post-2023, Baidu aimed to use Huawei’s Ascend 910B acceleration chips and expand the use of Kunlunxin chips for its AI infrastructure.

After Alibaba’s acquisition of CPU IP supplier Zhongtian Micro Systems in April 2018 and the establishment of T-Head Semiconductor in September of the same year, the company began developing its own ASIC AI chips, including the Hanguang 800.

TrendForce reports that T-Head’s initial ASIC chips were co-designed with external companies like GUC. However, after 2023, Alibaba is expected to increasingly leverage its internal resources to enhance the independent design capabilities of its next-gen ASIC chips, primarily for Alibaba Cloud’s AI infrastructure.

According to the data from TrendForce, currently, around 80% of the high-end AI chips used by Chinese cloud computing companies are sourced from NVIDIA. However, in the next five years, this proportion may decrease to 50% to 60%.

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(Photo credit: NVIDIA)

In pursuit of big chip technology, a team from the Chinese Academy of Sciences has designed an advanced 256-core processor system based on 16 chiplets and aims to expand this design to a 1,600-core big chip.

With each new generation of chips, increasing transistor density becomes progressively challenging. Chip manufacturers are exploring various methods to enhance processor performance, including architectural innovations, larger die sizes, multi-chiplet designs, and wafer-scale chips.

In a recent research paper, the Institute of Computing Technology at the Chinese Academy of Sciences has introduced a 256-core multi-chiplet design and further explored wafer-scale methods, constructing a big chip using an entire wafer.

The team presented an advanced 256-CPU multi-chiplet, referred to as the Zhejiang Big Chip, in the paper. This design is composed of 16 chiplets, each housing 16 CPUs based on the RISC-V architecture.

These chiplets are interconnected in a traditional symmetric multiprocessor (SMP) manner through a network-on-chip, so the chiplets could share memory.

Researchers from the Chinese Academy of Sciences stated that this design allows for scalability up to 100 chiplets (or 1,600-core).

Reports indicate that the chiplets are manufactured by Semiconductor Manufacturing International Corporation (SMIC) using 22-nm process technology. However, the power consumption of a 1,600-core component interconnected by an interposer and manufactured using a 22-nm process is not specified.

Researchers have noted that the multi-chiplet design can be applied to supercomputer processors. Within each chiplet, multiple cores are interconnected with ultra-low latency. Additionally, advanced packaging technology benefits the communication between chiplets, minimizing delays and NUMA (Non-Uniform Memory Access) effects in highly scalable systems to the greatest extent possible.

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(Photo credit: SMIC)

Christian Koitzsch, former plant manager of Bosch’s semiconductor facility in Dresden, has transitioned to a new role as the president of TSMC’s European Semiconductor Manufacturing Company (ESMC).

Frank Bösenberg, the Managing Director of the Semiconductor Association “Silicon Saxony” in Dresden, confirmed on the professional networking platform LinkedIn that Christian Koitzsch, the former plant manager of Bosch Semiconductor Manufacturing Company in Dresden, has embarked on a new journey in the new year, assuming the role of president at the ESMC, a subsidiary of TSMC.

In Christian Koitzsch’s LinkedIn profile, he also has indicated that his current position is the President of the ESMC. He is expected to oversee the construction of TSMC’s new plant in Dresden, with groundbreaking anticipated in the latter half of this year.

Dr. Koitzsch holds a PhD in physics and has previously held various managerial positions at Bosch, a major automotive components manufacturer. In July 2021, he assumed the role of plant manager at Bosch’s semiconductor fab in Dresden before transitioning to his current role as the President of the ESMC.

Bosch’s 12-inch fab primarily produces chips for automotive applications and is renowned for its high level of automation, claiming to be the most advanced fab in Europe. The designated location for TSMC’s Dresden plant happens to be right next door.

In August of 2023, TSMC announced the establishment of a joint venture, the ESMC, in Dresden, Germany’s eastern region. TSMC holds a 70% stake, while European semiconductor companies such as Bosch, Infineon, and NXP each hold a 10% stake.

This is TSMC’s first manufacturing facility in Europe, scheduled to commence production by the end of 2027. The German government has approved a subsidy of EUR 5 billion, facilitating this investment project with a total amount exceeding EUR 10 billion (approximately USD 10.9 billion).

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(Photo credit: TSMC)