As per the report from Bloomberg, the US government is set to invest USD 3.5 billion in Intel to enhance the production capacity of advanced chips for military and intelligence purposes. Reportedly, the move is potentially positioning Intel as a leading semiconductor provider in the defense market.

Under the US government’s RAMP-C initiative, numerous companies, including IBM, Microsoft, and NVIDIA, are developing chips for the US military. Stu Pann, Intel’s head of foundry, recently stated in an interview with Tom’s Hardware that the company has signed a USD 1 billion contract with the US government and the Department of Defense.

According to the same report from Tom’s Hardware, this funding could be part of the total appropriation of USD 39 billion under the CHIPS and Science Act or may stem from the proposed Secure Enclave program specifically designed for military and intelligence chips. In any case, it will strengthen Intel’s position as a leading manufacturer in the defense market.

As the new funding announcement emerges, the U.S. Department of Commerce is also poised to invest billions of dollars in leading chip manufacturers like Intel, Micron, Samsung, and others, aiming to enhance local semiconductor manufacturing capabilities.

The U.S. government enacted the “Chip Act” in 2022. For now, only three American companies currently benefiting from the subsidies, including BAE Systems, GlobalFoundries, and Microchip Technology.

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• [News] Announcement on Additional Subsidies for Chip Act Expected This Week; Intel Could Receive Billions

(Photo credit: Intel)

As Samsung’s foundry business closely trails TSMC, Economic Daily News has reported that Samsung is poised to secure orders for Meta’s next-gen AI chips, manufactured on a 2-nanometer process. If so, this may mark Samsung’s first 2nm customer, intensifying the rivalry with TSMC in the 2nm race.

According to The Korea Times, the potential collaboration between Meta and Samsung was discussed during Meta CEO Zuckerberg’s recent visit to South Korea.

The report cites anonymous officials stating that during Zuckerberg’s meeting with South Korean President Yoon Suk Yeol, he disclosed Meta’s reliance on TSMC. However, the current situation is described as “volatile” due to TSMC’s tight production capacity, which could potentially affect Meta’s supply in the long run.

Nevertheless, neither Meta nor South Korean officials have confirmed these rumors.

Currently, Meta has entrusted TSMC with the production of two AI chips. As per the Economic Daily News citing sources, the biggest challenge for Samsung’s foundry business lies in yield rates.

Previously, poor yield rates prompted Apple, Qualcomm, and Google to switch their orders to TSMC. If Meta indeed turns to Samsung for the next-generation AI chips, the key to the success of their collaboration still lies in yield rates.

As per Samsung’s previous roadmap, the 2-nanometer SF2 process is set to debut in 2025. Compared to the second-generation 3GAP process at 3 nanometers, it offers a 25% improvement in power efficiency at the same frequency and complexity, as well as a 12% performance boost at the same power consumption and complexity, while reducing chip area by 5%.

As stated in Samsung’s Foundry Forum (SFF) plan, Samsung will begin mass production of the 2nm process (SF2) in 2025 for mobile applications, expand to high-performance computing (HPC) applications in 2026, and further extend to the automotive sector and the expected 1.4nm process by 2027.

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• [News] Samsung Secures 2-Nanometer Order from Japanese AI Startup Preferred Networks
• [News] Samsung’s Discount Strategy Challenges TSMC as the Battle for 2nm Orders Heats Up

(Photo credit: Samsung)

South Korean memory giant SK Hynix is significantly investing in advanced chip packaging, aiming to capture more demand for High Bandwidth Memory (HBM), a vital component driving the burgeoning AI market.

According to Bloomberg’s report, Lee Kang-Wook, currently leading SK Hynix’s packaging research and development, stated that the company is investing over USD 1 billion in South Korea to expand and enhance the final steps of its chip manufacturing process.

“The first 50 years of the semiconductor industry has been about the front-end, or the design and fabrication of the chips themselves,” Lee Kang-Wook expressed in an interview with Bloomberg. “But the next 50 years is going to be all about the back-end, or packaging.”

The same report further indicates that the packaging upgrade will help reduce power consumption, enhance performance, and maintain SK Hynix’s leadership position in the HBM market.

Recent market trends also highlight the crucial role of advanced packaging in the manufacturing of HBM products. According to a recent report by South Korean media DealSite, the complex architecture of HBM has resulted in difficulties for manufacturers like Micron and SK Hynix to meet NVIDIA’s testing standards.

The yield of HBM is closely tied to the complexity of its stacking architecture, which involves multiple memory layers and Through-Silicon Via (TSV) technology for inter-layer connections. These intricate techniques increase the probability of process defects, potentially leading to lower yields compared to simpler memory designs.

The reason lies in the lower yield of HBM chips compared to traditional memory chips. The complex stacking architecture of HBM involves multiple memory layers and Through-Silicon Via (TSV) technology for interconnecting layers, which increases manufacturing complexity. In the multi-layer stacking of HBM, if any of the HBM chips are defective, the entire stack will be discarded.

HBM, a type of DRAM primarily used in AI servers, is experiencing a surge in demand worldwide, led by NVIDIA. Moreover, according to a previous TrendForce press release, the three major original HBM manufacturers held market shares as follows in 2023: SK Hynix and Samsung were both around 46-49%, while Micron stood at roughly 4-6%.

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• [News] HBM Manufacturers Encounter Challenges in NVIDIA Quality Tests, Raising Concerns over Yield and Production
• [News] SK Hynix Rumored to Propose Collaboration with Kioxia for HBM Production in Japan

(Photo credit: SK Hynix)

Amid industry slowdown, customers are reducing orders as they are currently clearing inventory accumulated over the past two years due to semiconductor supply constraints. Thus, Tower Semiconductor reportedly plans a three-week shutdown for most of its operations in Newport Beach, California, per Data Center Dynamics. Nearly 700 employees will take leave during this period.

Tower Semiconductor has reportedly confirmed the shutdown from April 1st to 7th and plans further closures from July 1st to 7th and October 7th to 13th. The same sources further states that most of Tower Semiconductor’s 699 employees will be impacted by three week-long furlough periods. The total number of employees at the Newport Beach facility was not disclosed by the company.

As IJIWEI cited sources, the management of Tower Semiconductor has announced that equipment will remain in “warm shutdown,” and power to unused areas of the plant will be shut off.

In contrast to the shutdown, the company has listed 13 job vacancies, including positions such as equipment engineers, electrical engineering interns, industrial engineering interns, and directors of aerospace and defense sales.

While Tower Semiconductor’s sales are far behind those of Intel and TSMC, it produces components for major clients like Broadcom and holds a significant position in rapidly growing fields like electric vehicles.

Recent reports from Bloomberg have also indicated that Tower Semiconductor has proposed a USD 9 billion investment to establish a facility in India. The report further cites that Tower Semiconductor aims to expand its operations over the next decade, with the ultimate goal of producing 80,000 wafers per month.

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• [News] India Enters Chip War with USD 21 Billion Semiconductor Investment Proposals

(Photo credit: Tower Semiconductor)

Geopolitical factors are driving countries to actively establish semiconductor manufacturing locally and offer subsidies. According to TSMC’s annual report, subsidies received from Japan and China amounted to NTD 47.545 billion in 2023, signaling a 5.74-fold increase from the previous year, reaching a record high. In contrast, the report also suggest the subsidies from the US government have yet to materialize.

TSMC did not specify the individual amounts of subsidies from the Japanese and Chinese governments. However, estimations cited by the report suggest that the Japanese government, aiming to revitalize the semiconductor industry, subsidized TSMC’s Kumamoto plant with up to JPY 476 billion, likely serving as the primary driver behind the substantial increase in TSMC’s subsidies in 2023.

The construction of TSMC’s Kumamoto Fab began in April 2022, with full assistance from the Japanese central and local governments. Recently, the opening ceremony was held, and trial production has commenced, with mass production expected in the fourth quarter of this year.

The subsidies from the Japanese and Chinese governments to TSMC are mainly used to subsidize the costs of real estate, buildings, and equipment purchases, as well as some of the costs and expenses associated with building construction and production operations.

On the other hand, TSMC’s US fab began construction in early 2021, with a grand tool-in ceremony held in December 2022, attended by the US President. Initially planned to invest USD 12 billion, the facility aims to build a N5 process fab with a monthly capacity of 20,000 wafers. Construction was scheduled to commence in 2021, with mass production slated to begin by the end of 2024, creating approximately 1,600 job opportunities in the local area.

However, it was previously reported by the TechNews that due to the delay in the first phase’s production timeline from the end of 2024 to the first half of 2025, the production schedule for the second phase will also be postponed to start after 2027. Subsequently, the production schedule has been pushed from this year to next year.

Despite the US government’s declaration to reinvigorate manufacturing and the introduction of the “CHIPS Act,” totaling USD 52 billion in subsidies, only three US companies have been subsidized so far.

These include BAE Systems, Microchip, and the third-largest foundry, Global Foundries, with Global Foundries receiving the most substantial subsidy of USD 1.5 billion. As of now, subsidies for TSMC have yet to be finalized.

• [News] TSMC’s Kumamoto Plant – Semiconductor Bubble or Once-in-a-Century Opportunity?
• [News] Latest Overview on TSMC’s Global Expansion Initiatives

(Photo credit: TSMC)