According to a Reuters report, the Japanese government has proposed a USD 65.1 billion (JPY 10 trillion) plan to boost the domestic chip and AI industry through subsidies and other financial support.

The plan aims to provide support totaling USD 65 billion (JPY 10 trillion) by fiscal 2030, with the goal of strengthening Japan’s control over its chip supply chain in response to potential impacts from U.S.-China trade tensions, as noted in the report.

The report indicated that Japan’s government is set to submit this plan to the next parliamentary session, and the draft includes financial support for mass production of next-generation chips, specifically targeting Rapidus and other AI chip suppliers. The report highlighted that, the government anticipates an economic impact of approximately JPY 160 trillion according to the draft.

Rapidus is scheduled to begin mass production of cutting-edge chips in Hokkaido starting in 2027, in collaboration with IBM and the Belgium-based research organization Imec, as the report pointed out.

According to the report, Japanese Prime Minister Shigeru Ishiba stated that the government would not issue deficit-covering bonds to fund the chip industry support plan. However, detailed information on how the plan will be financed has not been disclosed.

Last year, the Japanese government announced that it would allocate approximately JPY 2 trillion to boost its chip industry, as the report noted.

The latest plan is part of a comprehensive economic package anticipated for Cabinet approval on November 22, calling for a total investment of JPY 50 trillion in the chip industry from both public and private sectors over the next 10 years, according to the report from the Reuters.

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(Photo credit: Rapidus)

With Trump’s inauguration in January, “Made in America” is expected to dominate, driving an urgent push for semiconductor packaging and equipment companies to relocate to North America. Coupled with TSMC’s Arizona plant set to start mass production early next year, the Commercial Times reports that industry insiders foresee a surge in investments across the North American semiconductor supply chain.

TSMC’s Arizona fab is in the final stages of preparing for 4nm production, with a projected monthly capacity of 20,000 to 30,000 wafers. The company previously signed an MOU with Amkor Technology, a partnership widely seen as supporting advanced and back-end packaging efforts.

On November 8, however, leading packaging and testing company ASE also announced plans to set up a facility in Mexico, aiming to offer advanced packaging services for TSMC’s U.S.-produced chips.

Industry sources cited by Commercial Times speculate that ASE’s Mexico plant, once complete, could compete with Amkor for TSMC’s packaging and testing orders from the Arizona fab. Following the packaging process, the chips could be delivered directly to U.S.-based OEM/ODM partners, including Foxconn, Wistron, and Inventec, for final product assembly, completing the “Made in America” manufacturing chain.

The report also highlights TSMC’s stronghold on advanced packaging technologies such as 3D Fabric and SoIC, required for 2nm production, as well as SoW (system-on-wafer) technology. To meet customer demands, TSMC may need to establish in-house advanced packaging capabilities in the U.S. for even more advanced processes.

TSMC’s advanced packaging line is already highly automated, with optimized production flows reduced from over 300 steps to just over 200, and its gross margin is approaching the company average. The Commercial Times quotes industry experts who suggest that setting up advanced packaging capacity in the U.S. should be straightforward for TSMC, given its extensive experience in wafer fab construction, making it a matter of time.

(Photo credit: TSMC)

The U.S. has tightened restrictions on foundries supplying 7nm and below chips to Chinese clients. According to a report from Economic Daily News, following TSMC’s suspension of services to restricted Chinese clients, rumors suggest that South Korea’s Samsung is also affected by U.S. restrictions, preventing it from offering such foundry services to Chinese firms.

Samsung’s foundry division has reportedly notified Chinese clients about the restrictions, according to the report. However, Samsung has declined to comment on these rumors.

As for Intel, since it is closely aligned with the U.S., the company is also expected to comply with U.S. regulations, as the report mentioned. This would lead to a comprehensive blockade of China’s effort to develop advanced AI chips, signaling a new chapter in the U.S.-China semiconductor confrontation, potentially reshaping the global semiconductor landscape.

The report pointed out that currently, only three companies—TSMC, Samsung, and Intel—are capable of providing foundry services below the 7nm process. China’s leading foundry, SMIC, claims to have 7nm production capability, but it lacks the necessary economies of scale and efficiency.

Citing industry sources, the report suggests that Alibaba’s AI chip subsidiary, T-Head, could be the most heavily impacted by the restrictions, indicating that, following Huawei, Alibaba has now also come under scrutiny by the White House. Along with T-head, other Chinese AI chip companies, such as Bitmain and Cambricon, are also likely to be impacted.

Fully owned by Alibaba, T-Head has made rapid progress in next-generation chip development, with its “Yitian” series reaching sub-5nm technology, as the report mentioned. The company claims that its technology supports applications across diverse fields, including AI in automotive, gaming, and scientific research.

The report indicated that as China’s path to self-developed AI chips encounters setbacks, it may be forced to rely on downgraded versions of AI chips from U.S. companies like NVIDIA and AMD to comply with American restrictions. This development, as the report noted, could undermine Beijing’s hopes of using domestically developed AI chips to circumvent U.S. limitations.

(Photo credit: Samsung)

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As Samsung has implied earlier that it plans to collaborate with TSMC on HBM4, the memory giant seems to take a key step forward. A report by South Korean media outlet Maeli Business Newspaper discloses that the memory giant has already begun developing “Custom HBM4,” a next-gen high-bandwidth memory tailored specifically for Microsoft and Meta.

Samsung aims to begin mass production of HBM4 promptly upon completing development by the end of 2025, the report suggests.

Industrial sources cited by the report state that Samsung is establishing a dedicated production line for HBM4, which is now in the “pilot production” phase, where small-scale, trial manufacturing takes place ahead of mass production.

Citing sources familiar with the situation, the report further notes that Samsung is actively working on HBM4 designed for Microsoft and Meta. Both tech heavyweights have their own AI chips, namely, Microsoft’s Maia 100 and Meta’s Artemis.

As major tech companies make strides in scaling up their own AI data centers, there is a strong demand to cut costs associated with chip purchases. Therefore, many design and utilize their own AI accelerators while also buying AI chips from NVIDIA and AMD, according to Maeli.

Samsung, with its memory division and an LSI division capable of designing computational chips, is ideally positioned as a top partner for these major tech companies, according to Maeli.

Though the specifics of the HBM4 product that Samsung will supply to these companies remain undisclosed, Samsung did reveal the general specifications in February, according to Maeli.

Its data transmission speed, or bandwidth, reportedly reaches 2 terabytes per second (TB), marking a 66% increase over HBM3E, while its capacity has risen 33% to 48 gigabytes (GB), up from 36GB.

The report explains that unlike previous memory products, HBM4 is also referred to as “Computer-in-Memory (CIM)” due to its advanced capabilities, which go beyond standard memory functions to include specialized operations aligned with customer requirements.

Up to HBM3, the focus is said to be mainly on managing heat generation and maximizing speed, according to a semiconductor industrial official cited by the report. With HBM4, however, the emphasis will shift toward integrating AI computation capabilities (NPU) and specific data processing functions (IP) to meet evolving needs, the report says.

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(Photo credit: Samsung)

Currently, the global semiconductor industry is entering a new period of transformation. With the rapid development of AI, big data, cloud computing, and other technologies, the demand for high-performance computing chips, optical communication chips, and advanced packaging has surged, and recent reports suggest that prices for these types of chips are increasing.

Advanced Process and Advanced Packaging Products May See Price Increases

According to a recent report by Morgan Stanley, TSMC is considering raising prices for its 3nm process and CoWoS advanced packaging technology in response to soaring market demand. TSMC plans to implement these price increases in 2025, with the cost of its 3nm process potentially rising by up to 5%.

Industry analysts point out that on the demand side, major AI chip manufacturers such as NVIDIA and AMD heavily rely on TSMC’s 3nm process, and the explosive growth in AI technology has driven continuous demand for these chips, contributing to the price increase.

On the supply side, the high research and production costs associated with advanced process technology—including equipment investment, material costs, and R&D personnel—add significant pressure to the supply chain. Multiple factors have led to a tight supply of such chips, further driving up prices.

Additionally, TSMC’s 5nm and 4nm process quotes have increased more than previously anticipated by 4%, with some price hikes reaching as much as 10%.

Reports indicate that TSMC also plans to raise prices for its CoWoS advanced packaging technology, with potential increases between 10% and 20%. High demand for CoWoS from major companies like NVIDIA, AMD, Microsoft, Amazon, and Google has resulted in a shortage of CoWoS packaging capacity, which has driven up prices.

According to TrendForce research, NVIDIA is the primary driver of demand for CoWoS, and with the upcoming launch of its Blackwell series, demand for CoWoS is expected to increase by more than 10 percentage points annually by 2025.

Optical Communication Chip Sector Begins Price Increases

Demand for high-speed, high-bandwidth, and low-latency optical communication is rising, particularly in data centers, enterprise networks, and telecommunications, driving demand in the optical communication chip market. Recently, media reports revealed that Marvell, a major optical communication chip manufacturer, has issued a price increase notice, with its entire product line set to see price hikes starting January 1, 2025. According to TrendForce, Marvell ranked sixth in the global IC design market in 2023.

Industry forecasts predict that, driven by ongoing advances in optical communication technology and expanding applications, the global optical communication chip market will grow rapidly in the coming years.

The development and application of technologies such as silicon photonics, optoelectronic hybrid integration, and high-performance photonic chip materials are expected to bring new growth points and opportunities to the optical communication chip market.

(Photo credit: Marvell)