On January 26th, the Semiconductor Equipment Association of Japan (SEAJ) released statistical data revealing that in December 2023, sales of semiconductor equipment in Japan amounted to JPY 305.799 billion (approximately USD 2.07 billion), marking a 2.4% increase from November 2023.

This represents the second consecutive month of month-on-month growth. However, compared to the same month in 2022, there was a slight decline of 0.3%, marking the seventh consecutive month of contraction. Nonetheless, this decline is significantly smaller compared to the 11% decrease observed in the previous month.

In 2023, the total annual sales of semiconductor equipment in Japan amounted to roughly JPY 3.29 trillion (approximately USD 22.26 billion), reflecting a 6.7% year-on-year decrease. Despite the decline, this figure still represents the second-highest sales record in history, second only to the JPY 3.85 trillion (approximately USD 26.05 billion) recorded in 2022.

SEAJ predicts that aside from the recovery of foundries and logic manufacturers, expenditures from memory manufacturers are expected to significantly rebound in the second half of the fiscal year 2023 (from September 2023 to March 2024). It is anticipated that the compound annual growth rate (CAGR) will continue at 10% until March 2026.

Moreover, driven by the demand for new expenditures related to artificial intelligence (AI), semiconductor equipment sales in Japan are forecasted to surge by 27% in the fiscal year 2024 (starting from April 2024), reaching JPY 4.03 trillion (approximately USD 27 billion).

TrendForce has previously reported that Japan’s resurgence in the semiconductor arena is palpable, with the Ministry of Economy, Trade, and Industry fostering multi-faceted collaborations with the private sector. With a favorable exchange rate policy aiding factory construction and investments, the future looks bright for exports.

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• [News] Multiple Fabs in Japan to Commence Production Post-2024 Boosting Industry

NVIDIA’s AI chip supply faces constraints, with insufficient CoWoS advanced packaging production capacity at TSMC potentially being the main issue. According to Economic Daily News, NVIDIA is also providing advanced packaging services to Intel, with a monthly capacity of about 5,000 units. It is expected to join NVIDIA’s advanced packaging supply chain as early as the second quarter in 2024, grabbing a share of TSMC’s related orders.

Industry sources cited by the Economic Daily News believe that Intel’s participation will help alleviate the tight supply of AI chips.

TSMC declined to comment on the rumors on January 30th. As per industry sources cited by Economic Daily News, Intel’s entry into NVIDIA’s advanced packaging supply chain is expected to lead to a significant increase of nearly ten percent in total production capacity.

As per industry analysis cited in the report, even with Intel joining to provide advanced packaging capacity for NVIDIA, TSMC remains NVIDIA’s primary supplier for advanced packaging. When considering the expanded production capacity of TSMC and other related assembly and testing partners, it is estimated that they will supply approximately 90% of advanced packaging capacity for NVIDIA.

Supply chain sources cited by the report further indicate that TSMC is ramping up its advanced packaging production capacity. Production capacity is estimated to increase to nearly 50,000 units in the first quarter of this year, representing a 25% increase from the estimated nearly 40,000 units in December last year.

While Intel may potentially provide NVIDIA with nearly 5,000 units of advanced packaging capacity, this accounts for about 10% of the total. However, Intel is reportedly not involved in NVIDIA’s AI chip foundry orders.

Intel has advanced packaging capacity in Oregon and New Mexico in the United States and is actively expanding its advanced packaging capabilities in its new facility in Penang. It is noteworthy that Intel previously stated its intention to offer customers the option to only use its advanced packaging solutions, expected to provide customers with greater production flexibility.

Industry sources also indicate that the previous shortage of AI chips stemmed from three main factors: insufficient capacity in advanced packaging, tight supply of high-bandwidth memory (HBM3), and some cloud service providers placing duplicate orders. However, these bottlenecks have gradually been resolved, and the improvement rate is better than expected.

(Photo credit: Intel)

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• [News] Intense Competition with Samsung and Intel in Advanced Processes; TSMC Speeds Up 2nm Progress

Another breakthrough has emerged in flash memory layer technology! A recent report cited by tom’s Hardware has suggested that at the upcoming International Solid-State Circuits Conference (ISSCC) in February of this year, Samsung Electronics will unveil the next-generation V9 QLC NAND solution, pushing flash memory layer technology to 280 layers.

The Battle of Layers is Far from Over

Reportedly, Samsung’s V9 QLC boasts a storage density of 28.5Gb per square millimeter, achieving a maximum transfer rate of 3.2 Gbps. This surpasses the current leading QLC products (2.4 Gbps) and is poised to meet the requirements of future PCIe 6.0 solutions.

Additionally, the report further highlights that Samsung’s V9 QLC is considered the highest-density flash memory solution to date.

Before Samsung, major storage giants such as Micron and SK Hynix had already surpassed the 200-layer milestone. Micron reached 232 layers with a storage density of 19.5Gb per square millimeter, while SK Hynix achieved 238 layers with a storage density of 14.4Gb per square millimeter.

Still, 280 layers are not the end of the storage giants’ layer count competition; there will be breakthroughs with even higher layer counts in the future.

In August 2023, SK Hynix unveiled the world’s highest-layer 321-layer NAND flash memory samples, claimed to have become the industry’s first company developing NAND flash memory with over 300 layers, with plans for mass production by 2025.

Reportedly, SK Hynix’s 321-layer 1Tb TLC NAND achieves a 59% efficiency improvement compared to the previous generation 238-layer 512Gb. This is due to the ability to stack more units of data storage to higher levels, achieving greater storage capacity on the same chip, thereby increasing the output of chips per wafer unit.

On the other hand, Micron plans to introduce higher-layer products beyond the 232-layer milestone. Samsung, with ambitious plans, aims to stack V-NAND to over 1000 layers by 2030.

Kioxia and Western Digital, after showcasing their 218-layer technology in 2023 following the 162-layer milestone, also intend to develop 3D NAND products with over 300 layers in the future.

Amid Memory Market Rebound, What’s the Trend in NAND Flash Prices?

Amid economic headwinds and subdued demand in the consumer electronics market, the memory industry experienced a prolonged period of adjustment. It wasn’t until the fourth quarter of 2023 that the memory market began to rebound, leading to improved performances for related storage giants.

According to research conducted by TrendForce, a global market research firm, NAND Flash contract prices declined for four consecutive quarters starting from the third quarter of 2022, until they began to rise in the third quarter of 2023.

With a cautious outlook for market demand in 2024, the trend in NAND Flash prices will depend on the capacity utilization rates of suppliers.

TrendForce has projected a hike of 18-23% for NAND Flash contract prices, with a more moderated QoQ price increase of 3-8% for 2Q24. As the third quarter enters the traditional peak season, the quarterly price increase could potentially expand synchronously to 8-13%.

In 4Q24, the general price rally is anticipated to continue if suppliers maintain an effective strategy for controlling output. For NAND Flash products, their contract prices are forecasted to increase by 0-5% QoQ for 4Q24.

(Photo credit: Samsung)

Japanese telecommunications operator NTT is reportedly collaborating with American chipmaker Intel and other semiconductor manufacturers to research large-scale production of next-generation semiconductor technology, which involves significantly reducing power consumption using optical technology.

According to a report from Nikkei, SK Hynix is also set to participate in this initiative, expected to counter China through collaborative research and development strategies.

Meanwhile, the Japanese government will provide approximately JPY 45 billion in support. As cited by Nikkei quoting Japan’s Ministry of Economy, Trade, and Industry, Japan can lead the world in this technology as part of its strategy to revitalize the national semiconductor industry.

These companies are reportedly aiming to develop equipment manufacturing technology that integrates light with semiconductors and memory technology capable of storing data at Terabit-class speeds by the fiscal year 2027. Intel will provide technical development suggestions, aiming to reduce power consumption by 30-40% compared to conventional products.

As semiconductor scaling reaches physical limits, as per a report from TechNews, the industry is turning towards light. When combined with semiconductors, known as silicon photonics, it is expected to significantly reduce energy consumption. This technology is also seen as potentially game-changing for the semiconductor industry.

Signals received through optical communication is converted into electrical signals by specialized equipment, which are then transmitted to data center servers. Semiconductors within the servers then exchange electrical signals to process computations and memory. With the proliferation of AI and the need to process massive amounts of data, the demand for optical technology is anticipated to increase.

The integration of silicon photonics still presents numerous challenges, primarily concerning interface communication protocols. Consequently, synchronization in communication among semiconductor manufacturers is essential for the realization of silicon photonics technology.

Therefore, NTT aims to coordinate necessary technologies through collaboration with Intel and SK Hynix.

NTT holds a global leadership position in integrating optical and electronic technologies, having successfully pioneered the foundational technology of using light for transistor circuits. This achievement was published in the British scientific journal “Nature Photonics” in 2019, leading to the introduction of the IOWN (Innovative Optical and Wireless Network) fully optical network based on this technology.

(Photo credit: Intel)

With the highly anticipated opening of TSMC’s Kumamoto fab on February 24th, 2024, multiple Japanese or global semiconductor manufacturers are set to begin large-scale production in newly established plants in Japan.

According to sources cited by TechNews, this development will stimulate the growth and advancement of Japan’s domestic semiconductor supply chain, enhancing Japan’s semiconductor manufacturing capabilities, transitioning from Renesas Electronics’ 40-nanometer process to JASM’s 12-nanometer process.

TSMC Kumamoto Fab Set to Open on February 24

In Kikuyo Town, Kumamoto Prefecture, Japan Advanced Semiconductor Manufacturing (JASM) company, jointly invested by TSMC, SONY, and Japan’s DENSO, is currently constructing a 12-inch fab.

▲ TSMC’s Layout of Global Production Capacity Edited by TrendForce, January, 2024

The facility will employ 12/16-nanometer and 22/28-nanometer process, focusing on the production of chips for automotive electronic applications. The fab is scheduled to open on February 24, with mass production expected to commence in the fourth quarter of 2024.

This shift is regarded as the first step in Japan’s semiconductor revitalization policy. In support of this initiative, the Japanese government has provided a financial subsidy of JPY 476 billion (approximately USD 3.2 billion) to the JASM fab, covering nearly one-third of the total expenditure, which amounts to USD 8.6 billion.

Kioxia and Western Digital Jointly Constructing 12-Inch Plant

NAND Flash memory giants Kioxia and Western Digital are jointly investing in the construction of a 12-inch plant in Yokkaichi, Mie Prefecture. The facility is set to begin preparing for mass production of 3D NAND Flash memory products by March 2024.

Industry sources note that the plant’s construction will cost JPY 280 billion (approximately USD 1.8 billion ), with the Japanese government providing up to 92.9 billion yen (approximately USD 600 million) in subsidies.

Another Kioxia and Western Digital joint venture plant located in Kitakami, Iwate Prefecture, is slated to open in the second half of 2024. Originally scheduled for completion in 2023, the project faced delays due to unfavorable market conditions.

Renesas Electronics Expands Power Semiconductor Capacity

Renesas Electronics is set to launch a new power semiconductor production line in 2024. However, since the company’s Kofu factory in Yamanashi Prefecture closed in October 2014, Renesas is committing JPY 90 billion to install a 12-inch wafer production line at its existing facility to meet the growing demand for power semiconductors, especially in electric vehicles (EVs).

The new production line will enable Renesas Electronics to enhance its capacity for power semiconductors such as IGBT and MOSFET, with plans to achieve mass production by 2024. Renesas Electronics’ expansion plan is expected to receive subsidy support from the Japanese Ministry of Economy, Trade, and Industry.

Toshiba and ROHM Semiconductor Collaborate to Integrate Production Lines for Power Semiconductors

Toshiba and ROHM Semiconductor have reached an agreement to collaborate. Under the agreement, Toshiba’s power semiconductor factory will begin integrating production with ROHM’s newly developed Silicon Carbide (SiC) power semiconductor plant in Kunitomi City, Miyazaki Prefecture. This collaboration is expected to receive government subsidies equivalent to one-third of the investment in the project.

Japan’s New Fab Projects Beyond 2025

Beyond 2025, Japan is set to witness the emergence of several new plants, including Micron Technology’s new 1-gamma (1γ) DRAM production facility in Hiroshima Prefecture.

JSMC, a foundry subsidiary of Powerchip Semiconductor Manufacturing Corporation (PSMC), is collaborating with Japan’s financial group SBI to complete construction by 2027 and begin chip production thereafter.

Additionally, Japanese semiconductor startup Rapidus plans to commence production of 2-nanometer chips in Hokkaido by 2027.

Furthermore, TSMC is currently evaluating plans for its second plant in Japan, expected to be located in Kikuyo Town, Kumamoto Prefecture. Reports suggest that TSMC is set to officially announce the location of the second wafer plant on February 6th.

Earlier discussions by TSMC Chairman Mark Liu regarding the second plant in Japan indicated ongoing evaluations and discussions with the Japanese government. Once the decision to build the second plant is finalized, it is anticipated to manufacture products utilizing 7-nanometer to 16-nanometer process technologies.

Japan’s resurgence in the semiconductor arena is palpable, with the Ministry of Economy, Trade, and Industry fostering multi-faceted collaborations with the private sector. With a favorable exchange rate policy aiding factory construction and investments, the future looks bright for exports.

However, the looming shortage of semiconductor talent in Japan is a concern. In response, there are generous subsidy programs for talent development. Japan is strategically positioning itself to reclaim its former glory in the world of semiconductors.

Read more

• [News] TSMC Reportedly Announcing Kumamoto Plant 2 in Japan, while U.S. Subsidies Expected by End of March
• [News] ROHM Eyes R&D Expansion in Power Semiconductor Production Venture with Toshiba

(Photo credit: TSMC)