Semiconductor inventory adjustments are showing positive signs, with the MCU market, which was among the first to bear the brunt of price pressure, now leading the way as Chinese companies have recently ceased their aggressive price-cutting strategies to clear their inventory. In fact, some MCU product lines have even begun to see price increases.

According to reports from Taiwan’s Economic Daily, MCUs are widely used across various key sectors, including consumer electronics, automotive, and industrial control. The recent increase in pricing suggests a resurgence in end-demand, indicating that the semiconductor industry is on the path to recovery.

Prominent global MCU manufacturers include Renesas, NXP, and Microchip, all of which play essential roles in the global semiconductor industry. On the other hand, Taiwanese companies such as Holtek, Nuvoton, Elan, and Sonix represent the local landscape.

Industry experts attribute the current developments to the COVID-19 pandemic, which caused disruptions in the supply chain throughout 2020 and 2021, leading to a frenzied rush to secure semiconductor components. This resulted in a surge in orders and significant price increases for ICs. However, 2022 marked a change in the industry landscape as demand weakened in various end-user applications. MCUs were hit hardest, and manufacturers’ inventories climbed steadily, reaching historical highs, with some industry leaders acknowledging that their inventory levels reached several months’ worth of supply.

To address the challenges posed by these soaring inventories, the MCU industry faced its darkest period from the fourth quarter of last year to the first half of this year. Chinese MCU manufacturers resorted to aggressive price cuts, even drawing renowned IDMs into the price-cutting competition. Fortunately, recent market conditions have started to ease the inventory-clearing phase. Chinese MCU manufacturers, who could no longer bear losses, have stopped selling below cost and have even made slight price adjustments to return to a more reasonable pricing range.

Unnamed Taiwanese MCU manufacturers revealed that as the attitude of Chinese companies towards price-cutting has softened, the pricing gap between products from Taiwanese and Chinese companies have gradually narrowed. Moreover, there are indications of small, urgently needed orders coming in, which will facilitate faster inventory reduction.

The digital world is undergoing a massive transformation powered by the convergence of two major trends: an insatiable demand for real-time insights from data, and the rapid advancement of Generative artificial intelligence (AI). Leaders like Amazon, Microsoft, and Google are in a high-stakes race to deploy Generative AI to drive innovation. Bloomberg Intelligence predicts that the Generative AI market will grow at a staggering 42% year over year in the next decade, from $40 billion in 2022 to $1.3 trillion.

Meanwhile, this computational force is creating a massive surge in energy demand—posing serious consequences for today’s data center operators. Current power conversion and distribution technologies in the data center can’t handle the increase in demand posed by the cloud and machine learning—and certainly not from power-hungry Generative AI applications. The quest for innovative data center solutions has never been more critical.

Gallium Nitride (GaN) semiconductors emerge as a pivotal solution to data center power concerns, helping counter the impact of Generative AI challenges. We dive into how Generative AI affects data centers, the advantages GaN, and a prevailing industry perception of the Power Usage Effectiveness (PUE) metric—which is creating headwinds despite GaN’s robust adoption. With Generative AI intensifying power demands, swift measures are essential to reshape this perception and propel GaN adoption even further.

The rising impact of Generative AI on the data center

Today’s data center infrastructure, designed for conventional workloads, is already strained to its limits. Meanwhile, the volume of data across the world doubles in size every two years—and the data center servers that store this ever-expanding information require vast amounts of energy and water to operate. McKinsey projects that the U.S. alone will see 39 gigawatts of new data center demand, about 32 million homes’ worth, over the next five years.

The energy-intensive nature of generative AI is compounding the data center power predicament. According to one research article, the recent class of generative AI models requires a ten to a hundred-fold increase in computing power to train models over the previous generation. Generative AI applications create significant demand for computing power in two phases: training the large language models (LLMs) that form the core of generative AI systems, and then operating the application with these trained LLMs.

If you consider that a single Google search has the potential to power a 100W lightbulb for 11 seconds, it’s mind-boggling to think that one ChatGPT AI session consumes 50 to 100 times more energy than a similar Google search. Data centers are not prepared to handle this incredible surge in energy consumption. One CEO estimates that $1 trillion will be spent over the next four years upgrading data centers for AI.

Unfortunately, while technologies like immersion cooling, AI-driven optimizations, and waste heat utilization have emerged, they offer only partial solutions to the problem. A critical need exists for power solutions that combine high efficiency, compact form factors, and deliver substantial power outputs. Power electronics based on silicon are inefficient, requiring data centers to employ cooling systems to maintain safe temperatures.

GaN: Unparalleled performance and efficiency

GaN offers unparalleled performance and efficiency compared to traditional power supply designs, making it an ideal option for today’s data centers—particularly as Generative AI usage escalates. GaN transistors can operate at faster switching speeds and have superior input and output figures-of-merit. These features translate into system benefits including higher operating efficiency, exceeding Titanium, and increased power density.

GaN transistors enable data center power electronics to achieve higher efficiency levels—curbing energy waste and generating significantly less heat. The impact is impressive. In a typical data center environment, each cluster of ten racks powered by GaN transistors can result in a yearly profit increase of $3 million, a reduction of 100 metric tons of CO2 emissions annually, and a decrease in OPEX expenses by $13,000 per year. These benefits will only increase as the power demands of Generative AI increase and rack power density rises 2-3X.

While the benefits of GaN are profound, why aren’t even more data center operators swiftly incorporating the technology? Adoption faces headwinds from what we call the “PUE loophole”—an often-overlooked weakness within the widely accepted PUE metric.

The PUE Loophole

The PUE metric is the standard tool for assessing data center energy efficiency, calculated by dividing the total facility power consumption by the power utilized by IT equipment. The metric helps shape data center operations and guides efforts to reduce energy consumption, operational costs, and environmental impact.

Data center operators continuously strive to monitor and improve the PUE to indicate reduced energy consumption, carbon emissions, and associated costs. However, the PUE metric measures how efficiently power is delivered to servers—yet it omits power conversion efficiency within the server itself. As a result, the PUE calculation does not provide a comprehensive view of the energy efficiency within a data center—creating a blind spot for data center operators.

Consider that many servers still use AC/DC converters that are 90 percent efficient or less. While this may sound impressive—10 percent or more of all energy in a data center is lost. This not only increases costs and CO2 emissions, but it also creates extra waste heat, putting additional demands on cooling systems.

GaN is remarkably effective in addressing the PUE Loophole. For instance, the latest generation of GaN-based server AC/DC converters are 96 percent efficient or better – which means that more than 50 percent of the wasted energy can instead be used effectively. Across the entire industry, this could translate into more than 37 billion kilowatt-hours saved every year—enough to run 40 hyperscale data centers.

GaN can provide an immediately cost-effective way to close the PUE loophole and save high amounts of energy. But because the PUE doesn’t consider AC/DC conversion efficiency in the server, there is no incentive to make AC/DC converters more efficient.

This article was authored by Paul Wiener, Vice President of Strategic Marketing at GaN Systems.

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On October 11th, Amkor announced the official opening of its factory located in the Yen Phong 2C Industrial Park in Bac Ninh Province, Vietnam. The new facility, occupying 57 acres, is set to become Amkor’s largest, with an investment of approximately $1.6 billion by 2035. The factory primarily focuses on providing advanced system-level packaging and testing solutions to meet the semiconductor industry’s demand for advanced packaging. However, the company has not disclosed the factory’s current production and capacity.

Multiple Players Pursue CoWoS

The ongoing AI trend continues to drive demand for Chip-on-Wafer-on-Substrate (CoWoS) technology, benefiting TSMC, which holds a significant share of CoWoS production orders. However, companies like ASE Group, Amkor, and UMC are also positioning themselves in the CoWoS packaging manufacturing space. Industry experts believe that given the current high demand for TSMC’s CoWoS production, part of this demand may potentially shift to Amkor’s factories.

Furthermore, the popular Nvidia AI chips, which are in high demand globally, utilize 2.5D packaging technology, a responsibility currently held by TSMC. Recently, Nvidia hinted at the mass production of new AI chips like the GH200 and general server chip L40S, with reports suggesting that L40S will not require 2.5D packaging. Instead, it will be shared among several backend packaging companies, including ASE, Amkor, and SPIL.

Industry source has noted the strong demand for CoWoS in the AI sector, and with TSMC’s CoWoS production capacity already unable to meet demand for several quarters, some demand may potentially shift to Amkor or Samaung’s facilities.

Amkor has announced plans to expand its advanced packaging CoWoS-like capacity. According to industry insiders, Amkor’s monthly production capacity for 2.5D advanced packaging is expected to reach approximately 3,000 wafers in early 2023, with estimates of reaching 5,000 wafers by the end of 2023 and aiming for a significant increase to 7,000 units by the end of 2024.

Additionally, ASE Group has announced its presence in advanced CoWoS-related packaging. With their fan-out chip-on-substrate (FOCoS-Bridge) packaging technology, ASE has been chosen by major chip design house to handle their backend packaging after CoW.

In mid-September, South Korean media reported that Samsung is set to introduce its FO-PLP 2.5D advanced packaging technology to catch up with TSMC in the field of advanced packaging for AI chips. Samsung’s Advanced Packaging (AVP) team began developing FO-PLP advanced packaging for 2.5D chip packaging, allowing the integration of System-on-Chip (SoC) and High Bandwidth Memory (HBM) into an interposer to create a complete chip.

It’s worth mentioning that Samsung’s FO-PLP 2.5D packaging is rectangular, while TSMC’s CoWoS 2.5D uses a circular substrate. Samsung’s FO-PLP 2.5D packaging avoids edge substrate losses and boasts higher production efficiency. However, due to the need to transplant chips from wafers onto rectangular substrates, the process is more complex.

CoWoS Demand Continues

CoWoS technology is a form of 2.5D and 3D packaging, where chips are stacked and then packaged onto a substrate, resulting in a 2.5D or 3D structure. This technology reduces chip space, while also decreasing power consumption and costs. CoWoS packaging is applied in high-performance computing, artificial intelligence, data centers, 5G, the Internet of Things, automotive electronics, and other fields.

TrendForce research indicates a growing demand for advanced packaging technologies for AI and HPC chips. Currently, TSMC’s CoWoS is the primary choice for AI server chip production. CoWoS packaging mainly consists of CoW (Chip on Wafer), integrating various logic ICs (such as CPUs, GPUs, ASICs, etc.) and HBM memory, while oS (On Substrate) integrates CoW elements using Solder bump interconnects and packages them on a substrate. These CoWoS packages become the primary computing units on server motherboards, together with other components like networks, storage, power supply units (PSUs), and other I/O units, forming complete AI server systems.

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TrendForce reports indicate a universal price increase for both DRAM and NAND Flash starting in the fourth quarter. DRAM prices, for instance, are projected to see a quarterly surge of about 3-8%. Whether this upward momentum can be sustained will hinge on the suppliers’ steadfastness in maintaining production cuts and the degree of resurgence in actual demand, with the general-purpose server market being a critical determinant.

PC DRAM: DDR5 prices, having already surged in the third quarter, are expected to maintain their upward trajectory, fueled by the stocking of new CPU models. This forthcoming price hike cycle for both DDR4 and DDR5 is incentivizing PC OEMs to proceed with purchases. Although manufacturers still have substantial inventory and there’s no imminent shortage, Samsung has been nudged to further slash its production. However, facing negative gross margins on DRAM products, most manufacturers are resistant to further price reductions, instead pushing for aggressive increases. This stance sets the stage for an anticipated rise in DDR4 prices by 0–5% and DDR5 prices by around 3–8% in the fourth quarter. Overall, as DDR5 adoption accelerates, an approximate 3–8% quarterly increase is projected for PC DRAM contract prices during this period.

Server DRAM: Buyer inventory of DDR5 has climbed from 20% in Q2 to 30–35% recently. However, with only 15% being actually utilized in servers in Q3, market uptake is slower than expected. Meanwhile, Samsung’s intensified production cutbacks have notably shrunk DDR4 wafer inputs, causing a supply crunch in server DDR4 stocks. This scenario leaves no leeway for further server DDR4 price reductions. In response, manufacturers, aiming to enhance profits, are accelerating DDR5 output.

Looking ahead, Q4 forecasts anticipate stable server DDR4 average prices, while server DDR5 is set to maintain a declining trajectory. With DDR5 shipments on the rise and a notable 50-60% price disparity with DDR4, the blended ASP for the range is poised for an upswing. This leads to an estimated 3–8% quarterly hike in Q4 server DRAM contract prices.

Mobile DRAM: Inventories have bounced back to healthy levels sooner than other sectors, thanks to price elasticity driving an increase in per-device capacity, and revitalizing purchasing enthusiasm in 2H23. On the other hand, although Q4 smartphone production hasn’t reached the previous year’s levels for the same period, a seasonal increase of over 10% is still supporting demand for mobile DRAM. However, it’s crucial to note that current manufacturer inventories remain high, and production cuts haven’t yet altered the oversupply situation in the short term. Nevertheless, manufacturers, under profit margin pressures, are insisting on pushing prices upward. For products where inventory is more abundant, such as LPDDR4X or those from older manufacturing processes, the estimated contract price increase will be about 3–8% for the quarter. In contrast, LPDDR5(X) appears to be in tighter supply, with projected contract price increases of 5–10%.

Graphics DRAM: A niche market dynamic and an acceptance of price hikes among buyers suggest sustained procurement of mainstream GDDR6 16Gb chips, preparing for expected price increases in 2024. The launch of NVIDIA’s new Server GPU L40s in the third quarter is facilitating the depletion of existing manufacturer inventories. Furthermore, gaming notebooks are excelling in sales, surpassing the general notebook market this year. Consequently, manufacturers are experiencing less inventory stress for graphics DRAM than they are for commodity DRAM. This landscape sets the stage for an anticipated 3-8% hike in graphics DRAM contract prices for the fourth quarter.

Consumer DRAM: Samsung initiated significant production reductions starting in September to diminish its surplus of older inventory. These cuts are projected to hit 30% by the fourth quarter. With the anticipation of steadily declining inventories, manufacturers are looking to increase consumer DRAM contract prices, aiming for hikes of more than 10%, to avoid incurring losses. However, even though some producers raised their prices at September’s close, demand continues to be lackluster, with purchasing and stock-up efforts not as strong as anticipated. This deviation in pricing goes against the expected supply-demand balance, suggesting a more modest estimated rise of 3–8% in consumer DRAM contract prices for the fourth quarter—below manufacturers’ initial targets.

TSMC is set to conduct an investor meeting on the 19th, with Morgan Stanley, UBS, and Bank of America Securities releasing their latest reports ahead of the event. These reports highlight five main areas of interest:

1. Q4 Operational Outlook
2. Future Gross Margin Trends
3. Potential Adjustments to Full-Year Revenue Estimates and Capital Expenditure
4. Economic and Operational Outlook for the Coming Year
5. 2nm Production Plans

Despite market uncertainties surrounding factors such as end-market demand, the Chinese mainland’s economic trajectory, and semiconductor industry cycles, Morgan Stanley Securities anticipates a 10% QoQ increase in TSMC’s Q4 revenue. They attribute this to strong demand for AI GPUs and ASICs, urgent orders from products like smartphone system-on-chips (SoCs) and PC GPUs, as well as sustained demand for Apple’s iPhones. Additionally, the gross margin is expected to benefit from the depreciation of the New Taiwan Dollar, potentially reaching 53%, surpassing the market consensus of 52.2%.

Bank of America Securities similarly projects a 10% QoQ revenue growth for TSMC in Q4, with a gross margin estimate of 52.7%. UBS Securities, on the other hand, has adjusted its Q4 revenue growth forecast from 10% to 7% while maintaining their expectation of a 10% YoY decline in full-year revenue.

In terms of capital expenditures, Morgan Stanley Securities, taking into account factors such as Intel’s 3nm outsourcing and delays in the U.S. factory expansion, estimates that TSMC’s capital expenditures will remain around $28 billion for both this year and the next. UBS Securities, however, believes that due to a slower short-term business recovery, capital expenditures for this year and the next will be adjusted to $31 billion and $30 billion, respectively.

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