TrendForce research indicates that in 1H23, the utilization rate of 8-inch production capacity primarily benefited from sporadic inventory restocking orders for Driver ICs in the second quarter. Additionally, wafer foundries initiated pricing strategies to encourage clients into early orders, offering solid backup. However, in 2H23, persistent macroeconomic and inventory challenges led to the evaporation of an anticipated demand surge.

Meanwhile, stockpiles in automotive and industrial control segments grew after meeting initial shortages, tempering demand. Under fierce price competition from PMIC leader Texas Instruments (TI), inventory reductions for Fabless and other IDMs were drastically inhibited. With IDMs ushering in output from their new plants and pulling back outsourced orders, this compounded reductions to wafer foundries. This dynamic saw 8-inch production capacity utilization dipping to 50–60% in the second half of the year. Both Tier 1 and Tier 2/3 8-inch wafer foundries saw a more lackluster capacity utilization performance compared to the first half of the year.

Heading into 2024, with the prevailing economic turbulence, the overall semiconductor foundry capacity utilization rate will face challenges in recovery. The 8-inch capacity utilization for 1Q24 is poised to mirror—or potentially dip below—4Q23 figures, revealing a glaring lack of recovery indicators.

However, starting from 2Q24, TrendForce posits that while clarity on end sales remains murky due to overarching economic risks, inventory levels are expected to wane, returning to a healthier equilibrium. The ensuing periodic restocking and the added momentum from orders shifted to Taiwanese foundries (owing to decoupling from China), should keep the 8-inch utilization rate from diving further. The average annual utilization rate for 8-inch wafers in 2024 is pegged around 60–70%. A swift return to yesteryear’s peak capacity seems difficult for now.

Taiwanese and Korean semiconductor foundries face the brunt of order curtailments

A closer look reveals Chinese foundries, such as SMIC and HuaHong Group (primarily HHGrace for 8-inch), exhibiting marginally superior 8-inch utilization rates than their Taiwanese and Korean peers. The proactive pricing approaches of Chinese foundries and China’s push for domestic IC substitution and production are key drivers. However, despite price reduction across foundries in 2H23, a predominantly conservative market outlook from clients, combined with the absence of urgent orders, meant these reductions rendered limited assistance to the 8-inch wafer utilization rate in the latter half of the year.

Panning to 2024, SMIC and HHGrace are forecast to outpace their Taiwanese and Korean counterparts in an 8-inch utilization rate resurgence. HHGrance could even see a stellar rebound, reaching 80–90%. On the Taiwanese front, TSMC grapples with PMIC order pullbacks, predicting an expected drop in 8-inch utilization to below 60% from 4Q23 to 1Q24. UMC and PSMC, in the same span, are gearing up to maintain levels above 50%.

Furthermore, even traditionally resilient Japanese and European IDMs commenced their inventory recalibration in 3Q23, potentially further stalling the recovery timeline for the 8-inch capacity utilization rate. TrendForce insights suggest that, with mounting inventory pressures, Infineon is curtailing orders to external foundries such as UMC and Vanguard. This strategy will likely suppress Vanguard’s 8-inch utilization rate into 1Q24, casting a gloomier shadow than earlier projections.

Korean heavyweight, Samsung, has prioritized its 8-inch production for large-sized Driver ICs, CIS, and smartphone PMICs. However, the persistent softness in consumer demand has prompted their clientele toward a more guarded-order strategy. Furthermore, Chinese CIS patrons, aligning with local manufacturing inclinations, are transitioning toward native foundries. Consequently, Samsung’s 8-inch utilization rate has languished in 2H23, with expectations set at approximately 50% throughout 2024.

DRAM Spot Market:

As China’s National Day holiday approaches, the frequency of buyers making transactions has dropped. However, transaction prices remain fairly high, and there are no clear signs indicating that prices in the spot market will buckle in the near term. The average spot price of mainstream chips (i.e., DDR4 1Gx8 2666MT/s) rose by 0.33% from US$1.500 last week to US$1.505 this week.

NAND Flash Spot Market:

Participants of the spot market have slightly dropped in transaction frequency as the National Day Golden Week is just around the corner, with overall concluded prices maintained on an ascending trend, and a continuance of subsequent purchase willingness will depend on the market sentiment and the actual level of demand after the long holiday. 512Gb TLC wafer spots have climbed 3.47% this week, arriving at US$1.818.

Advanced Semiconductor Engineering, Inc. (ASE) has unveiled its Integrated Design Ecosystem™ (IDE) – a collaborative design toolkit, meticulously tailored to enhance advanced package architecture on the VIPack™ platform. This innovation streamlines the transition from single-die SoC to multi-die disaggregated IP blocks, encompassing chiplets and memory integration through 2.5D or advanced fanout structures.

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According to a report by China’s media outlet Jiwei, Japanese officials recently released a photo of a meeting with Chairman Mark Liu of TSMC. Japan’s Minister of Economy, Trade, and Industry, Yasutoshi Nishimura, updated his personal X account on the 1st of the month and posted a photo of the meeting. In his post, he mentioned the meeting with Mark Liu and the progress at the Kumamoto factory.

“We had a meeting with Chairman Mark Liu of TSMC,” wrote Yasutoshi Nishimura on X. “TSMC, in collaboration with Sony and Denso through their joint venture JASM, is constructing a factory in Kumamoto as a critical national initiative to revitalize Japan’s semiconductor industry. Cooperation in Kumamoto is making progress, and Japanese materials and equipment manufacturers, along with other related companies, have announced new investments. We will continue to collaborate for future innovations.”

The JASM Kumamoto factory, which began construction in 2022, started using its office building in August of this year. Hundreds of employees have been gradually moving in, and from October, machinery and equipment will be progressively installed. The earliest small-scale trial production is expected in the second quarter of 2024, with full-scale production by the end of the year. The monthly production capacity will reach 45,000 12-inch wafers, and TSMC is not ruling out the possibility of expanding with a second Kumamoto factory.

Sources confirm that a group of TSMC equipment-related engineers has recently quietly arrived in Japan. They have received orientation materials officially starting work at the TSMC Kumamoto factory.

Industry sources suggest that TSMC is on track to achieve its goal of starting production at the Kumamoto factory by the end of next year, and possibly even ahead of schedule.

台湾のマーク・リュウTSMC会長と会談しました。熊本におけるTSMCとソニー・デンソー合弁会社JASMの工場建設は、日本の半導体産業の再興に向けた重要な国家プロジェクトです。熊本では、日本の素材・装置メーカーなど関連企業が続々と新しい投資を表明するなど連携が進んでいます。今後も将来のイノベー… pic.twitter.com/zAIYxiDESa

— 西村やすとし NISHIMURA Yasutoshi (@nishy03) October 1, 2023

(Photo credit: TSMC)

According to a report by Taiwan’s Economic Daily, TSMC is set to hold its Q3 earnings conference on October 19th. The market is eagerly anticipating insights from the company’s top executives on six key areas: the latest semiconductor market outlook, Q3 financial forecasts, the status of 3-nanometer chip orders, progress in advanced packaging expansion, capital expenditure updates, and the latest developments in the AI market.

During the conference, TSMC will also unveil its financial results for the previous quarter. Analysts are expecting TSMC’s Q3 consolidated revenue, when measured in USD, to grow by nearly 10%, with a chance of gross margin exceeding the company’s estimated median of 52.5%. This suggests that Q3 profits are likely to surpass those of Q2.

TSMC has already announced its combined revenue for July and August, which totaled NT$366.3 billion. Based on TSMC’s financial forecasts, Q3 consolidated revenue is expected to reach between $16.7 billion and $17.5 billion USD. Using an exchange rate of 30.8 NT dollars per USD, this translates to an expected consolidated revenue in NT dollars ranging from NT$514.4 billion to NT$539 billion.

In the first half of the year, TSMC’s capital expenditure was $9.94 billion in Q1 and $8.17 billion in Q2, totaling $18.11 billion. Securities analysts previously estimated that TSMC’s annual capital expenditure for this year could range from $32 billion to $36 billion USD, with the possibility of a decrease next year.

Some industry experts believe that as advanced manufacturing processes have advanced to 2 nanometers, the customer base for the latest processes has started to decrease. Looking at the 3-nanometer process that is already in mass production, only Apple is currently leading the adoption, while others like NVIDIA, Qualcomm, and MediaTek are expected to transition to the 3-nanometer process next year. As a result, TSMC is shifting its focus to expanding production in the more cost-effective advanced packaging sector, which is one of the key reasons for the decrease in TSMC’s capital expenditure.

Furthermore, TSMC is currently estimating that it will be the first to introduce an enhanced version of the 3-nanometer process next year, with expectations to transition to the 2-nanometer process by 2025, using a new Gate-All-Around (GAA) transistor architecture to replace the FinFET transistor architecture used for nearly a decade. This represents a significant step into a new generation of semiconductor technology. Additionally, capacity for advanced packaging is expected to double next year.

(Photo credit: TSMC)