According to a report by China’s tech news outlet JIWEI, industry sources have revealed that TSMC’s Kumamoto semiconductor fab in Japan is expected to turn profitable in 2025, following mass production anticipated to commence by the end of 2024.

Industry sources suggest that TSMC has bolstered its deployment in Kumamoto, Japan, in cooperation with its ecosystem partners in Taiwan, to better support key local clients. This collaboration is expected to yield benefits starting early 2024 from TSMC’s new fab.

The decision behind TSMC’s establishment in Kumamoto has multiple facets. Firstly, it’s believed that Apple desires full-fledged support from TSMC for its major supplier, Sony. Secondly, TSMC has maintained a long-term mutually beneficial relationship with Japan, potentially enhancing its research capabilities in materials and ensuring stable production capacity. Lastly, the Japanese government’s subsidies for factory construction align with TSMC’s needs, significantly reducing operational risks due to long-term orders from Sony and automotive clients.

Supply chain reports indicate that TSMC’s Kumamoto fab has steadily completed cleanrooms and electromechanical integration. With water and power supplies progressively becoming available, the relocation is anticipated to begin on October 1st, with subsequent trial production activities. This investment represents the sole overseas expansion of TSMC that is progressing smoothly and ahead of schedule, with plans for official mass production in the coming year.

Recent details regarding TSMC’s second Japanese fab have surfaced, indicating a groundbreaking date around April 2024, with production slated to commence by late 2026. The total investment is expected to exceed 1 trillion Japanese yen, primarily for producing 12nm process chips.

(Photo credit: TSMC)

In recent years, with the rise of AI and 5G technologies leading to increasing computational demands, Silicon Photonics technology has once again become a focal point of discussion in the semiconductor industry.

TrendForce Perspective:

• Rewriting Semiconductor Development Rules with Silicon Photonics 

Since the development of the semiconductor industry, the industry’s trajectory has largely followed the development predicted by Gordon Moore – roughly doubling the number of transistors that can be accommodated on an integrated circuit approximately every two years. However, as chip sizes continue to shrink, chip architecture design is gradually being challenged. Semiconductor manufacturers, including TSMC, Samsung, and Intel, are striving to break through Moore’s Law as their goal. Others have publicly announced their focus on mature processes (the industry divides at 7nm, with 7nm and below considered advanced processes) and optimization of existing technologies.

However, even as manufacturers push the boundaries of Moore’s Law, leading to increased transistor density per unit area, signal loss issues inevitably arise during signal transmission since chips rely on electricity to transmit signals. Despite the increased transistor count, power consumption problems persist. Silicon Photonics technology, which replaces electrical signals with optical signals for high-speed data transmission, successfully overcomes this challenge, achieving higher bandwidth and faster data processing. With this approach, chips do not need to cram more transistors per unit area or pursue smaller nanometers and nodes. Instead, they can achieve higher integration and performance on existing processes, further advancing technology.

• Optimistic about Silicon Photonics Technology, but Breakthroughs Will Take Time

Currently, Silicon Photonics technology still faces various challenges, including alignment and coupling, thermal management, modulation and detection, expansion and integration, among others. Significant breakthroughs are unlikely in the short term, and major global manufacturers are still in the early development stages. In Taiwan, recent reports suggest that TSMC is actively venturing into Silicon Photonics technology. While TSMC has not officially confirmed this news, during the Silicon Photonics International Forum, a senior vice president from TSMC clearly stated, “If a good Silicon Photonics integration system can be provided, it can address the key issues of energy efficiency and AI computing power. This could be a Paradigm Shift, and we might be at the beginning of a new era.”

This suggests that TSMC is optimistic about the development of Silicon Photonics technology. Although Taiwanese companies have not formally announced their entry into the Silicon Photonics field, it is expected that with the explosive growth in demand for data transmission, storage, and computing driven by AI technology, Silicon Photonics will undoubtedly be a critical technology for future semiconductor development.

• The continuous AI integration of smart homes accelerates with the Matter protocol.

In the context of the modern era, smart homes are the AI applications that come second only to smartphones and smartwatches. As the penetration rate of smart home devices increases, more and more AI-enabled devices are permeating into human life, ushering in a large-scale era of personalization. The realization of smart homes not only requires smart appliances but also sensors and energy management systems. The deployment of AI will enhance recognition and control.

The diverse application scenarios of smart homes result in a wide variety of products. Despite the vast market size, there is an issue of product ecosystem fragmentation, leading to slow deployment. This can be addressed through the integration of the smart home market via the Matter protocol. As Matter facilitates communication between different devices through software protocols, the importance of software in devices will increase with the product’s AI capabilities, catering to the demands of edge AI applications.

• The RISC-V architecture is on the rise, and the form of MCUs with NPUs will continue to proliferate.

Although CPUs in MCUs are currently dominated by the Arm architecture, open-source RISC-V is gradually rising. In addition to its features such as customization, modularity, and cost-effectiveness, RISC-V is expected to become one of the advantages in smart home applications. It continues to gain support and application from many major manufacturers, expanding the ecosystem of the RISC-V architecture.

Because TinyML models are much smaller than general-purpose AI, they do not require a large amount of computational resources for deployment. This makes them suitable for IoT devices or smart homes that require large-scale deployment, with significant advantages in both technology and cost. Furthermore, with the diverse range of products in smart homes and the increasing demand for product functionality, the form of MCUs equipped with NPUs will become increasingly common as they adapt to the product’s uniqueness and evolve with AI integration.

DRAM Spot Market
Spot prices of chips in the lower price range have started to elevate this week as some NAND Flash suppliers are very committed to raising their spot prices. On the whole, there has been some stabilization of DRAM spot prices, and the overall volume of spot transactions has also increased a bit. Looking ahead in the short term, it remains to be seen whether suppliers’ ongoing production cuts will spur buyers to stock up. However, spot prices are expected to remain mostly flat until the end of this year. The average spot price of the mainstream chips (i.e., DDR4 1Gx8 2666MT/s) rose by 0.28% from US$1.450 last week to US$1.454 this week.

NAND Flash Spot Market

Buyers, concerned over the cessation of low prices, are continuously proposing order inquiries, though they are hesitant towards following up on prices and hoarding inventory during actual transactions. Continuity of transaction dynamics is not apparent in the spot market, where several packaged dies are seeing repeated fluctuations. Compared to the panicked purchases over the past several weeks, buyers have now composed themselves, and are deciding on procurements based on the recovery of demand. Wafer remains as the category with a clearer inflation tendency, where 512Gb TLC wafer spots have climbed 2.02% in the spot market this week, arriving at US$1.620.

According to a report by Reuters on September 5, 2023, in a bid to bolster its domestic semiconductor industry and achieve semiconductor self-reliance, the Chinese government is planning to launch the third phase of the “Big Fund,” with a capital infusion of approximately 300 billion Chinese Yuan (about 41 billion US Dollars).

TrendForce Insights:

• The Big Fund’s Expanding Scope and Potentially Aggressive Third Phase Investment

The National Integrated Circuit Industry Investment Fund, commonly referred to as the “Big Fund,” originated from the Chinese State Council’s “Outline for the Promotion of National Integrated Circuit Industry Development” issued in June 2014. Its ultimate goal is to bring China’s semiconductor industry up to international standards by 2030 and nurture a group of companies to become international Tier 1 suppliers.

In September 2014, the National Integrated Circuit Industry Investment Fund was officially established, raising a total of 138.7 billion Chinese Yuan, with a primary focus on semiconductor manufacturing and secondary emphasis on design and testing. After five years, the second phase of the fund was organized in October 2019, with its scale expanding to 204.1 billion Chinese Yuan, with a further focus on equipment and materials.

Now, just four years after the second phase, there are reports of China planning to launch the third phase, with a fundraising target increased to 300 billion Chinese Yuan. This indicates that China, faced with semiconductor technology restrictions led by the United States, is increasing its efforts to support the semiconductor industry. The investment strategy for the third phase may be even more aggressive compared to the previous two phases.

• Equipment, Materials, and EDA Remain Key Areas of Investment in the Third Phase

The second phase of the Big Fund exhibited a greater emphasis on the upstream segments of the semiconductor industry, allowing for comprehensive coverage of China’s domestic semiconductor supply chain. However, due to the high technical barriers in semiconductor manufacturing equipment, materials, EDA, and other upstream areas, which are still dominated by a few manufacturers in the global supply chain, short-term investments may not yield immediate results for China’s domestic supply chain.

Additionally, in the face of external technology restrictions, it has become more challenging for China’s semiconductor upstream supply chain to achieve technological breakthroughs through mergers, acquisitions, or attracting foreign talent. Consequently, it is expected that the third phase of the Big Fund will expand its support for Chinese domestic semiconductor manufacturing equipment, materials, and EDA software providers, with a particular focus on key players such as NAURA, AMEC, SMEE, NSIC, Kempur, Jingrui, Empyrean, among others.