News
According to TechNews’ report, during a recent financial conference, Samsung revealed its plans to diversify its sales structure by expanding its clientele in the fields of artificial intelligence semiconductors and automotive, moving away from its previous heavy reliance on the mobile sector.
As of 2023, it is understood that Samsung’s foundry sales distribution includes 54% from mobile, 19% from high-performance computing, and 11% from automotive.
According to a report from Wccftech, senior executives at Samsung have indicated that major players such as super-scale data centers, automotive original equipment manufacturers (OEMs), and other clients have been in contact with Samsung, considering the adoption of Samsung’s foundry services to manufacture their designed chips.
This includes the in-development 4-nanometer artificial intelligence accelerator and the 5-nanometer chips for the top-ranked electric vehicle company. Currently, Samsung is gearing up with its advanced packaging solution called SAINT (Samsung Advanced Interconnection Technology), aiming to compete with TSMC’s advanced packaging, CoWoS. Based on information disclosed by Samsung, there might be a collaboration with AMD in the field of artificial intelligence, involving the manufacturing of certain chips.
In fact, recent rumors suggest that Samsung has already reached an agreement with AMD to provide HBM3 and packaging technology for the upcoming Instinct MI300 series. Additionally, AMD might adopt a dual-sourcing strategy for the Zen 5 series architecture, choosing TSMC’s 3-nanometer process and Samsung’s 4-nanometer process technology for manufacturing the next-generation chips.
According to sources, besides the artificial intelligence domain, Samsung is likely to have received orders from the electric vehicle giant Tesla. The speculation points towards the possibility of fulfilling orders for Tesla’s next-generation HW 5.0 chip, designed for fully autonomous driving applications.
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(Photo credit: Samsung)
News
In recent years, the dynamics of the memory market have undergone significant changes, with South Korean memory giants Samsung and SK Hynix facing intense competition from Chinese firms. They are experiencing heightened competitive pressures, and the technological gap is steadily narrowing.
As per reports from South Korean media outlet Business Korea, insiders in the market have disclosed that with China increasing its support for the memory industry, after several years of development, the technological gap in NAND Flash with leading global enterprises has now narrowed to approximately two years. However, in the case of DRAM, the original technological gap of about five years is still maintained.
The report indicates that the primary reason for the shortened gap is that the threshold for NAND Flash technology is relatively lower, allowing for a faster catch-up speed, and this acceleration is continuously progressing, thereby further reducing the technological disparity.
China’s largest memory semiconductor company, YMTC (Yangtze Memory Technologies Co.), officially unveiled its fourth-generation 3D TLC NAND Flash memory, named X3-9070, based on the Xtacking 3.0 architecture, at the 2022 Flash Memory Summit (FMS).
YMTC has also taken the lead over Samsung and SK Hynix by achieving production of NAND Flash memory with a higher number of layers.
It is understood that in the year 2022 alone, investments from the Chinese government and state-owned investment funds amounted to approximately CNY 50 billion. The continuous and substantial funding is aimed at supporting development efforts, encompassing both technological catch-up and faster market penetration.
The report emphasizes that as semiconductor circuit miniaturization approaches its limits, China may seize another opportunity to narrow the technological gap, particularly in advanced packaging techniques.
China, being the world’s second-largest packaging technology market, boasts a more comprehensive ecosystem. Companies like JCET, Tongfu Microelectronics Co., and HT-Tech have all secured positions in the top ten semiconductor packaging enterprises globally, while no Korean companies made the list.
TrendForce pointed out that there is indeed a technological difference of about two years between South Korean memory giants and Chinese firms. YMTC has the research and development capabilities but is primarily hindered by the lack of key equipment for mass production. The subsequent developments depend on whether China can acquire crucial semiconductor equipment. If successful, YMTC may have the opportunity to transition to higher levels, such as 300 layers, and proceed to mass production.
(Photo credit: Samsung)
News
According to IJIWEI’s report, NVIDIA recently confirmed that it is actively working on new “compliant chips” tailored for the Chinese market. However, these products are not expected to make a substantial contribution to fourth-quarter revenue.
On November 21, during NVIDIA’s earnings briefing for the third quarter of 2024, executives acknowledged the significant impact of tightened U.S. export controls on AI. They anticipated a significant decline in data center revenue from China and other affected countries/regions in the fourth quarter. The controls were noted to have a clear negative impact on NVIDIA’s business in China, and this effect is expected to persist in the long term.
NVIDIA’s Chief Financial Officer, Colette Kress, also noted that the company anticipates a significant decline in sales in China and the Middle East during the fourth quarter of the 2024 fiscal year. However, she expressed confidence that robust growth in other regions would be sufficient to offset this decline.
Kress mentioned that NVIDIA is collaborating with some customers in China and the Middle East to obtain U.S. government approval for selling high-performance products. Simultaneously, NVIDIA is attempting to develop new data center products that comply with U.S. government policies and do not require licenses. However, the impact of these products on fourth-quarter sales is not expected to materialize immediately.
Previous reports suggested that NVIDIA has developed the latest series of computational chips, including HGX H20, L20 PCIe, and L2 PCIe, specifically designed for the Chinese market. These chips are modified versions of H100, ensuring compliance with relevant U.S. regulations.
As of now, Chinese domestic manufacturers have not received samples of H20, and they may not be available until the end of this month or mid-next month at the earliest. IJIWEI’s report has indicated that insiders have revealed the possibility of further policy modifications by the U.S., a factor that NVIDIA is likely taking into consideration.
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(Photo credit: Nvidia)
News
Equipment is playing an indispensable role during the wafer manufacturing process. In response to market needs, the global EUV lithography supplier, ASML, has recently taken significant steps.
ASML’s Bold Move: Annual Investment of EUR 100 Million in Berlin Plant
As reported by the German media “Handelsblatt,” the Netherlands-based company ASML plans to invest EUR 100 million (USD 109 million) in 2023, with a similar annual investment in the subsequent years. This investment aims to enhance the production and development capabilities of ASML’s manufacturing plant located in Berlin, Germany.
Reports indicate that ASML’s Berlin plant primarily produced core components of EUV equipment, including wafer clamps, wafer tables, reticle chucks and mirror blocks. ASML acquired this facility, known as “Berliner Glas,” in 2020.
Foundries Actively Pursue EUV equipment
The EUV equipment plays a crucial role in manufacturing, utilizing specific wavelength light for radiation to precisely imprint images on wafers. Currently, the EUV equipment market is highly concentrated, with only a few global companies mastering this technology. Among them, Dutch company ASML stands out as the world’s largest and most advanced EUV company. Additionally, companies like Nikon, Canon, and Shanghai Micro Electronics Equipment (SMEE) are strategically positioning themselves in the EUV sector.
EUV technology, used for exposing semiconductor process, is indispensable due to its high cost, complex processes, and limited supply. ASML is the sole global supplier of EUV. For advanced processes below 7nm, EUV serves as an essential device. Developed over more than 20 years, EUV technology has become the cornerstone of advanced processes, enabling the continuation of Moore’s Law for at least another decade.
As a crucial EUV equipment supplier, ASML is working on a new generation of NA-EUV equipment, where “NA” represents numerical aperture. A higher NA value means a higher achievable resolution, allowing for more transistors on the chip. It is expected that by the year-end, ASML will unveil the world’s first high-NA EUV and deliver it to Intel.
Currently, both TSMC and Samsung utilize EUV equipment for manufacturing, covering TSMC’s 7nm, 5nm, and 3nm processes and Samsung’s EUV Line (7nm, 5nm, and 4nm) located in Hwaseong, Korea, along with the 3nm GAA process.
TSMC’s 2nm process will continue to leverage EUV technology. In a previous announcement in September, TSMC disclosed the acquisition of Intel’s subsidiary IMS for up to US 432.8 million, focusing on the research and production of electron beam lithography machines. Industry experts believe that TSMC’s move ensures the technical development of critical equipment and meets the supply demand for the commercialization of 2nm.
Following 2nm chips. Samsung plans to achieve mass production of 2nm processes in the mobile field by 2025, expanding to HPC and automotive electronics in 2026 and 2027, respectively. According to the report in September, Samsung is gearing up to secure the yield of the next-generation EUV equipment, High-NA, with the prototype expected to launch later this year and official supply next year.
After announcing its return to the foundry business, Intel revealed in October that it has commenced mass production of Intel 4 process nodes using EUV technology. Currently, both Intel 7 and Intel 4 have achieved mass production, and Intel 3 is progressing according to plan, with the goal of completion by the end of 2023.
(Image: ASML)
Insights
Microsoft announced the in-house AI chip, Azure Maia 100, at the Ignite developer conference in Seattle on November 15, 2023. This chip is designed to handle OpenAI models, Bing, GitHub Copilot, ChatGPT, and other AI services. Support for Copilot, Azure OpenAI is expected to commence in early 2024.
TrendForce’s Insights:
Microsoft has not disclosed detailed specifications for Azure Maia 100. Currently, it is known that the chip will be manufactured using TSMC’s 5nm process, featuring 105 billion transistors and supporting at least INT8 and INT4 precision formats. While Microsoft has indicated that the chip will be used for both training and inference, the computational formats it supports suggest a focus on inference applications.
This emphasis is driven by its incorporation of the less common INT4 low-precision computational format in comparison to other CSP manufacturers’ AI ASICs. Additionally, the lower precision contributes to reduced power consumption, shortening inference times, enhancing efficiency. However, the drawback lies in the sacrifice of accuracy.
Microsoft initiated its in-house AI chip project, “Athena,” in 2019. Developed in collaboration with OpenAI. Azure Maia 100, like other CSP manufacturers, aims to reduce costs and decrease dependency on NVIDIA. Despite Microsoft entering the field of proprietary AI chips later than its primary competitors, its formidable ecosystem is expected to gradually demonstrate a competitive advantage in this regard.
Google led the way with its first in-house AI chip, TPU v1, introduced as early as 2016, and has since iterated to the fifth generation with TPU v5e. Amazon followed suit in 2018 with Inferentia for inference, introduced Trainium for training in 2020, and launched the second generation, Inferentia2, in 2023, with Trainium2 expected in 2024.
Meta plans to debut its inaugural in-house AI chip, MTIA v1, in 2025. Given the releases from major competitors, Meta has expedited its timeline and is set to unveil the second-generation in-house AI chip, MTIA v2, in 2026.
Unlike other CSP manufacturers, both MTIA v1 and MTIA v2 adopt the RISC-V architecture, while other CSP manufacturers opt for the ARM architecture. RISC-V is a fully open-source architecture, requiring no instruction set licensing fees. The number of instructions (approximately 200) in RISC-V is lower than ARM (approximately 1,000).
This choice allows chips utilizing the RISC-V architecture to achieve lower power consumption. However, the RISC-V ecosystem is currently less mature, resulting in fewer manufacturers adopting it. Nevertheless, with the growing trend in data centers towards energy efficiency, it is anticipated that more companies will start incorporating RISC-V architecture into their in-house AI chips in the future.
The competition among AI chips will ultimately hinge on the competition of ecosystems. Since 2006, NVIDIA has introduced the CUDA architecture, nearly ubiquitous in educational institutions. Thus, almost all AI engineers encounter CUDA during their academic tenure.
In 2017, NVIDIA further solidified its ecosystem by launching the RAPIDS AI acceleration integration solution and the GPU Cloud service platform. Notably, over 70% of NVIDIA’s workforce comprises software engineers, emphasizing its status as a software company. The performance of NVIDIA’s AI chips can be further enhanced through software innovations.
On the contrary, Microsoft possess a robust ecosystem like Windows. The recent Intel Arc GPU A770 showcased a 1.7x performance improvement in AI-driven Stable Diffusion on Microsoft Olive, this demonstrates that, similar to NVIDIA, Microsoft has the capability to enhance GPU performance through software.
Consequently, Microsoft’s in-house AI chips are poised to achieve superior performance in software collaboration compared to other CSP manufacturers, providing Microsoft with a competitive advantage in the AI competition.
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