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Amid a two-year recalibration in the smartphone and electronic component supply chain, inventory levels have rebounded to a healthy state. The infusion of new applications like AI and auto driving has fueled a comprehensive replenishment of consumer electronics inventory, propelling IC design with a surge in urgent and short orders.
Although wafer prices surged by over 40% during the pandemic, recent declines in utilization suggest an impending price reduction cycle to maintain operational rates, expected to lead to a reduction in IC design costs. Key players, boasting inventory turnover periods below a hundred days, are well-positioned for a potential upswing in demand, as reported by CTEE.
While most semiconductor companies are anticipated to experience declines in 2023, inventory levels have already tapered off. MediaTek boasts an inventory turnover period of just 89.11 days, with Realtek and ITE Tech at 96.77 and 84.11 days, respectively.
IC design companies emphasize the dominance of rush orders in the latter half of the year. Despite the uncertainty of economic visibility, confidence prevails regarding the new applications like AI, auto driving, and LEO(Low Earth Orbit) satellites, promising an upsurge in demand.
IC design companies also point out that the 3-5 year cycle of device replacement is imminent. The infusion of new AI applications and technological advancements in decision-making and workplace practices is expected to drive business demand. Positive developments, such as Microsoft discontinuing support for Windows 10, are anticipated to gain traction by 2024.
Anticipating 2024, expectations hinge on the U.S. two-year consecutive interest rate hike policy. Global inflation is projected to ease, and consumer momentum is set to recover. Within the IC design sector, a gradual emergence from the trough is foreseen. Fueled by the dual positive factors of heightened demand and reduced costs, the industry is poised to restore itself to prospering conditions and orderliness.
(Image: Mediatek Facebook)
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According to ChinaTimes’ report, Big Fund II is once again making strategic moves, this time targeting a stake in Tsing Micro Technology, a company specializing in reconfigurable computing chips.
Reconfigurable architecture chips possess extensive general computing capabilities, making them essential for addressing high computing power demands. Big Fund II’s investment is a proactive step to position itself in the upcoming computing power market, avoiding potential “bottleneck” crises.
Amidst the pressure of technology restrictions from the United States, Big Fund II, tasked with supporting the development of domestic semiconductor companies in China, has been active in recent investment initiatives.
At the end of October this year, Big Fund II invested CNY 14.5 billion, participating in the capital increase of the memory production project at ChangXin XinQiao.
ChinaFund News reports that Tsing Micro Technology’s main business focuses on innovative research and development, as well as industrial applications of reconfigurable computing chips.
Tsing Micro Technology recently underwent a business change, with the addition of ten institutional shareholders, including National Integrated Circuit Industry Investment Fund Phase II (Big Fund II), GigaDevice, CMB International, and Beijing Zhongguancun Science City Technology Growth Investment Partnership, among others. The registered capital of the company increased from approximately CNY 33.18 million to around CNY 38.9 million, with Big Fund II holding a 5.8824% stake.
The report highlights that Tsing Micro Technology’s technical team originates from the reconfigurable computing team at Beijing Tsinghua University’s Institute of Microelectronics. The team has been selected for three consecutive years (since 2021) in EETimes’s “Silicon 100: Startups Worth Watching” list.
Tsing Micro Technology’s Co-founder and CTO, Peng Ouyang, stated in November 2022 that faced with the explosive growth in the demand for computing power due to artificial intelligence, mainstream GPU chips require significant investment and cannot meet the “computing power black hole” brought about by the development of large models. He emphasized that reconfigurable computing chips are a solution to this challenge.
Since 2019, Tsing Micro Technology has undergone multiple rounds of financing. In January 2019, angel investors included Baidu and Focus Media. Subsequent Series A funding involved investments from SK Hynix in South Korea, Green Pine Capital Partners, and SenseTime, among others. Series B financing was led by CDB RW Funds, with participation from SenseTime and Legend Capital.
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(Photo credit: Tsing Micro Tech)
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In the global landscape of self-developed chips, the industry has predominantly embraced the Arm architecture for IC design. However, Meta’s decision to employ the RISC-V architecture in its self-developed AI chip has become a topic of widespread discussion. It is said the growing preference for RISC-V is attributed to three key advantages including low power consumption, high openness, and relatively lower development costs, according to reports from UDN News.
Noted that Meta exclusively deploys its in-house AI chip, “MTIA,” within its data centers to expedite AI computation and inference. In this highly tailored setting, this choice ensures not only robust computational capabilities but also the potential for low power consumption, with an anticipated power usage of under 25W per RISC-V core. By strategically combining the RISC-V architecture with GPU accelerators or Arm architecture, Meta aims to achieve an overall reduction in power consumption while boosting computing power simultaneously.
Meta’s confirmation of adopting RISC-V architecture form Andes Technology Corporation, a CPU IP and Platform IP supplier from Taiwan, for AI chip development underscores RISC-V’s capability to support high-speed computational tasks and its suitability for integration into advanced manufacturing processes. This move positions RISC-V architecture to potentially make significant inroads into the AI computing market, and stands as the third computing architecture opportunity, joining the ranks of x86 and Arm architectures.
Regarding the development potential of different chip architectures in the AI chip market, TrendForce points out that in the current overall AI market, GPUs (such as NVIDIA, AMD, etc.) still dominate, followed by Arm architecture. This includes major data centers, with active investments from NVIDIA, CSPs, and others in the Arm architecture field. RISC, on the other hand, represents another niche market, targeting the open-source AI market or enterprise niche applications.
(Image: Meta)
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The growing importance of advanced processes in wafer foundries is evident, propelled by innovations like AI and high-performance computing. While 3nm chips have entered the consumer market, efforts are underway in wafer foundries to advance to 2nm chips. Recent reports suggest progress in 1nm chips, further fueling the competition among wafer foundries.
2nm Chips: Unveiling in 2025
Anticipated by 2025, the race for 2nm chips is in full swing, with major players like TSMC, Samsung, and Rapidus actively pursuing mass production. TSMC plans to implement GAAFET transistors in its 2nm process by 2025, offering a 15% speed boost and up to a 30% reduction in power consumption compared to N3E, all while increasing chip density by over 15%.
Samsung is on a similar trajectory, planning to unveil its 2nm process by the end of 2025. As report by media in October, Samsung Foundry, said on Semiconductor Expo 2023 in South Korea, has already initiated discussions with major clients, expecting decisions in upcoming future.
Rapidus aims for trial production of 2nm chips in 2025, scaling up to mass production by 2027. Reports in September indicated that ASML plans to establish a technical support hub in Hokkaido, Japan in 2024. Approximately 50 engineers will be dispatched to Rapidus’ ongoing construction site for the 2nm plant, assisting in the setup of EUV lithography equipment on the trial production line, and providing support for factory activation, maintenance, and inspections.
When will 1nm chip arrive?
Apart from 2nm, the industry’s attention turns to 1nm-level chips. According to industry plans, mass production of 1nm-level chips is expected between 2027 and 2030.
Nikkei recently reveals collaboration between Japanese chipmaker Rapidus, Tokyo University, and the French technological research organization Leti to develop foundational technology for 1nm IC design. Talent exchange and technical sharing are slated to begin in 2024, aiming to establish a supply system for indispensable 1nm chip products, crucial for enhancing auto driving and AI performance.
On the other hand, collaborations with IBM for 1nm products are also being considered. The computing performance of 1nm products, anticipated to become mainstream in the 2030s, is expected to surpass 2nm by 10-20%.
TSMC and Samsung are also eyeing 1nm chip development. TSMC’s initial plan to build a 1.4nm process wafer fab in Taiwan faced delays after abandoning the original site selection in October. Samsung aims to launch its 1.4nm process by the end of 2027, with improved performance and power consumption through an increased number of nanosheets per transistor, promising enhanced control over current flow and reduced power leakage.
(Image: TSMC)
Insights
In TrendForce’s report on the self-driving System-on-Chip (SoC) market, it has witnessed rapid growth, which is anticipated to soar to $28 billion by 2026, boasting a Compound Annual Growth Rate (CAGR) from 2022 to 2026.
In 2022, the global market for self-driving SoC is approximately $10.8 billion, and it is projected to grow to $12.7 billion in 2023, representing an 18% YoY increase. Fueled by the rising penetration of autonomous driving, the market is expected to reach $28 billion in 2026, with a CAGR of approximately 27% from 2022 to 2026.
Given the slowing growth momentum in the consumer electronics market, self-driving SoC has emerged as a crucial global opportunity for IC design companies.
Due to factors such as regulations, technology, costs, and network speed, most automakers currently operate at Level 2 autonomy. In practical terms, computing power exceeding 100 TOPS (INT8) is sufficient. However, as vehicles typically have a lifespan of over 15 years, future upgrades in autonomy levels will rely on Over-The-Air (OTA) updates, necessitating reserved computing power.
Based on the current choices made by automakers, computing power emerges as a primary consideration. Consequently, NVIDIA and Qualcomm are poised to hold a competitive edge. In contrast, Mobileye’s EyeQ Ultra, set to enter mass production in 2025, offers only 176 TOPS, making it susceptible to significant competitive pressure.
Seamless integration of software and hardware can maximize the computational power of SoCs. Considering the imperative for automakers to reduce costs and enhance efficiency, the degree of integration becomes a pivotal factor in a company’s competitiveness. However, not only does integration matter, but the ability to decouple software and hardware proves even more critical.
Through a high degree of decoupling, automakers can continually update SoC functionality via Over-The-Air (OTA) updates. The openness of the software ecosystem assists automakers in establishing differentiation, serving as a competitive imperative that IC design firms cannot overlook.