In recent updates from Shanghai Industrial μTechnology Research Institute (SITRI), Dr. Xing Wei’s research team has achieved a groundbreaking milestone in 300mm SOI wafer manufacturing technology. They have successfully created China’s inaugural 300mm Radio Frequency Silicon-on-insulator (RF-SOI) wafer.

The team harnessed the resources of the China Key Laboratory for Integrated Circuit Materials’ 300mm SOI research platform, systematically resolving critical technical challenges required for 300mm RF-SOI wafers. This involved low-oxygen high-resistance crystal production, deposition of low-stress high-resistivity polycrystalline silicon films, and non-contact planarization.

This achievement not only marks the inception of China’s 300mm SOI manufacturing technology but is also anticipated to drive the entire RF-SOI chip design, manufacturing, and packaging industry chain within China. It will also ensure a stable supply of SOI wafers in the country.

SOI technology boasts a wide range of applications, encompassing RF-SOI for communication RF front-ends, high-power Power-SOI components, and Photonics-SOI technology for optical communications. SOI technology, which positions silicon wafers on insulating material, has emerged as a game-changing innovation with unique advantages, break limitations associated with traditional silicon materials and integrated circuits.

(Image: SITRI)

Following the US’s recent expansion of chip control measures targeting China on October 17th, the American chip maker, Advanced Micro Devices (AMD) is reportedly planning workforce reductions of approximately 10% to 15% at its Shanghai research center. Additionally, there are rumors of impending layoffs in the Chinese subsidiary of Synopsys, a leading Electronic Design Automation (EDA) giant from the US.

As reported by the tech media ICsmart, recent leaks on a Chinese social community have hinted at AMD’s workforce cuts in China, which are expected to affect around 10% to 15% of their employees, encompassing roughly 300 to 450 individuals. Notably, the Radeon Technologies Group (RTG) department is anticipated to be significantly affected.

Insiders within AMD revealed that on October 25th, all meeting rooms at the Shanghai research center were pre-booked by the Human Resources department, strongly suggesting that layoffs are on the horizon.

Established in 2006, AMD’s Shanghai research center stands as their largest facility outside of the United States, employing around 3,000 professionals. The center plays a crucial role in designing, developing, and testing products like Central Processing Units (CPUs), Graphics Processing Units (GPUs), and Accelerated Processing Units (APUs). It has been instrumental in introducing innovative products to AMD’s portfolio, such as the Ryzen series processors and Radeon series graphics cards. The RTG department at AMD is responsible for advancing Radeon series graphics card technologies.

AMD’s financial report for the second quarter of this year reveals a total revenue of $5.4 billion, a decline of 18% compared to the previous year. Significantly, the net profit was only $27 million, marking a substantial 94% drop from the same period last year.

China represents AMD’s most substantial overseas market, with sales reaching $5.27 billion in 2022, contributing to 22% of their total revenue.

Reports indicate that the US introduced new bans on Chinese chips on October 7th last year, particularly affecting high-performance chips used for AI computations. On October 17th, the US further tightened these restrictions, leading to the inclusion of more NVIDIA and AMD GPU products, directly impacting AMD’s research and development efforts in mainland China. Given this context, news of AMD layoffs in China doesn’t come as a surprise.

The report also suggests that, while this isn’t something China welcomes, from another perspective, these layoffs might channel more talent towards local GPU manufacturers. Many key figures in Chinese GPU startups have their roots in AMD.

Furthermore, there are rumors that Synopsys recently convened an all-hands meeting, indicating the possibility of impending layoffs.

As a global leader EDA, Synopsys established its presence in China back in 1995 and has since established offices in various cities. The company boasts a workforce of over 1,500 people and has a robust system for technical research and talent development.

The report mentions that the impact of the US restrictions on Synopsys mainly stems from its inability to supply to Chinese chip design companies already included on the US Entity List, such as Huawei’s Hisilicon. While it has negatively impacted its business, the growing trend of Chinese firms pursuing self-developed chip production mitigates the overall impact.

(Image: AMD)

During the 3Q23 Earning Call on October 19th, TSMC provided updates on its international factory construction. Notably, the new plant in Phoenix, Arizona, USA, is on track to commence production in the first half of 2025. The German facility is scheduled for production in 2027. The Kumamoto plant in Japan is making swift progress, with production expected to start by the end of 2024. TSMC remained silent regarding its plans following the announcement of discontinuing Phase 3 construction at the Longtan Park.

In line with its global expansion strategy, TSMC has established semiconductor fabrication plants in various locations, including Phoenix, USA, Dresden, Germany, and Kumamoto, Japan. In the recent update, TSMC shared details about these overseas projects. In the case of the new US facility, it has already hired nearly 1,100 local employees and aims to employ 4-nanometer (N4) technology by the first half of 2025.

As for the Dresden plant, TSMC announced the construction of a specialized semiconductor fabrication facility primarily catering to the automotive and industrial sectors, utilizing 22/28-nanometer and 12/16-nanometer technologies. Construction is set to begin in the latter half of 2024, with production slated to commence by the end of 2027.

The Kumamoto plant in Japan is making the most rapid progress. TSMC noted that this semiconductor fabrication facility will use 12/16-nanometer and 22/28-nanometer process technologies. Approximately 800 local employees have already been hired, and equipment for this plant began to be relocated this month. Production is expected to commence by the end of 2024.

Regarding the higher initial production costs at overseas plants, TSMC explained that these costs are higher than those at its Taiwanese semiconductor fabrication facilities. This is primarily due to the smaller scale of overseas semiconductor fabrication plants and the higher overall supply chain costs. In comparison to Taiwan’s mature semiconductor ecosystem, overseas semiconductor ecosystems are still in their early stages.

In addition, there has been significant attention on recent developments related to the Longtan Park Phase 3. However, TSMC made no mention of it in the press conference, only stating that they will continue to evaluate suitable construction locations.

Notably, TSMC recently received an extension waiver from the US Department of Commerce’s Bureau of Industry and Security (BIS) to continue operations in Nanjing, China. They are currently in the process of obtaining “Validated End-User (VEU)” authorization, with expectations of securing an indefinite exemption in the near future.

As the leading global supplier of NAND memory, Samsung is embarking on an ambitious journey to enhance its V-NAND technology, also known as 3D NAND. Early in this week, Samsung has officially declared its commitment to commence mass production of the 9th generation V-NAND memory, featuring an astonishing 300+ layers, by 2024. This achievement will establish a new industry record for the highest number of active layers, solidifying Samsung’s industry leadership.

In a blog post on Samsung Electronics, Jung-Bae Lee, President and Head of Samsung Electronics’ Memory Business, stated, “The ninth-generation V-NAND is well under way for mass production early next year with the industry’s highest layer count based on a double-stack structure.”

Samsung was diligently working on the 9th generation V-NAND back in August this year, preserving the double-stacked technology they first introduced in 2020. Not only is Samsung confirming the trajectory of their next-gen non-volatile memory technology, but it also surpasses competitors by boasting more active layers. It’s been disclosed that SK Hynix’s upcoming 3D NAND will have 321 active layers, Samsung is set to surpass this number.

Jung-Bae Lee further elaborated, “Samsung is also working on the next generation of value-creating technologies, including a new structure that maximizes V-NAND’s input/output (I/O) speed.”

While precise performance details of Samsung’s 9th generation V-NAND remain undisclosed, it will power their upcoming SSDs. In the near future, it is anticipated that Samsung will introduce retail SSDs with the PCIe Gen5 interface, in line with the Samsung 990 Pro series.

Regarding long-term technological advancement, Samsung is committed to minimizing interference between units, reducing device dimensions, and maximizing the count of vertical layers. These innovative strides are clearing the path for Samsung to achieve the industry’s most compact unit size. These endeavors will propel Samsung toward their ambitious goal of developing over 1,000 layers of 3D NAND and distinctive memory solutions, ensuring the continued relevance of their products for data centers, personal computers, and a wide range of applications.

(Image: Samsung)

Read more:

• Memory Spot Price Updates: DRAM and NAND Flash Prices Soaring at Relatively High Levels
• NAND Flash Spot Prices Surge, DRAM Demand Stalls, Spot Prices Remain Volatile in Late September

Amid increased U.S. restrictions on China’s semiconductor industry, Chinese chip equipment manufacturers are witnessing a notable uptick in domestic orders. Over the first eight months of this year, Chinese chip equipment managed to capture nearly half of all orders. This serves as a compelling sign that the fears expressed by companies such as NVIDIA, AMD, and Intel about losing ground to domestic rivals in the Chinese market are materializing.

On October 17th, the Biden administration tightened chip export rules, barring American companies, including NVIDIA, from selling AI chips to China. At the same time, the U.S. Commerce Department’s Bureau of Industry and Security (BIS) placed 13 Chinese GPU firms on its Entity List, further unsettling global semiconductor and AI supply chains. Ironically, these moves could expedite China’s domestic AI chip industry’s advancement amid the pressure.

Huatai Securities’ analysis reveals that Chinese chip foundries have been winning an increasing number of bids for machinery equipment this year. In the first eight months of this year, they secured 47.25% of these bids, with the percentage soaring to 62% in August. In comparison, during March and April, the rate was only 36.3%. This trend reflects a turning point for China’s chip equipment industry and showcases its rapid transition towards self-sufficiency.

As per Reuters, insiders disclosed that prior to the U.S. export bans, China’s advanced chip foundries rarely utilized domestic equipment, reserving it for expanding production. Yet, in reaction to the ongoing restrictions, they’ve proactively started testing homegrown equipment on all foreign devices and plan to fully replace foreign gear with domestic alternatives. This transition has greatly boosted local firms such as AMEC and NAURA.

Analysts observe that China’s local equipment makers have notably enhanced their production capacity, especially in wet etching and cleaning, positioning them for global competition with U.S. counterparts. What’s more, the quality of Chinese-made equipment has surpassed expectations, often advancing by up to two years. The substantial revenue growth in the sector attests to China’s remarkable progress in the semiconductor equipment industry.

Nonetheless, photolithography equipment remains a field where China’s domestic equipment struggles to break through due to its demanding requirements for optical and process precision. China has faced challenges in procuring extreme ultraviolet (EUV) lithography machines crucial for manufacturing cutting-edge chips. The situation is further complicated by the joint efforts of the United States, the Netherlands, Japan, and other allies to restrict the export of advanced deep ultraviolet (DUV) lithography machines to China.
(Image: AMEC)