Undaunted by deadlocked US-Sino relations, the great pandemic of 2020, and the US Department of Commerce’s ban on Huawei’s use of software and equipment produced by US manufacturers in the same year, China’s packaging and testing industry has, instead, used these factors as stimulus get back on track. Faced with these three major challenges, the Chinese government has responded with policies such as domestically producing both equipment and semiconductors, allowing China’s packaging and testing industry to buck the trends set in 2020. According to TrendForce statistics, industry revenue in 2020 reached US$7.02 billion and approximately US$9.53 billion in 2021.

A brief summary of China’s packaging and testing industry in recent years is as follows: the US-Sino trade war has been raging since 2018 and, due to tariff issues and the gradual rise in personnel salaries, terminal manufacturers whom had already established plants or subsidiaries in China were forced to gradually relocate relevant factories to SE Asia and India in order to avoid growing overhead costs, moreover impacting the revenue performance of China’s packaging and testing industry. As of June 2019, the tariff issue remained unresolved due to dubious US.-Sino relations but this issue could no longer impede the revenue recovery momentum of China’s packaging and testing industry.

Packaging and testing and localized equipment skirts bans and a moderate threshold for technology research and development attracts overseas manufacturers

After the U.S. Department of Commerce imposed export control bans on Huawei, HiSilicon, and SMIC, the market mostly predicted that China’s packaging and testing industry would be hit next but this did not happen. According to TrendForce, the primary reason for this is that the nature of current back-end packaging and testing technology is relatively crude compared to front-end wafer manufacturing and, considering Chinese government’s recent policy of localizing equipment and the degree of substitutability of non-US equipment manufacturers, even if the U.S. Department of Commerce proposes further bans against the industry, its effects will be limited.

In response to the US-Sino trade conflict, the Chinese government has proposed relevant measures such as semiconductor autonomy which has driven a gradual mainstreaming of domestic equipment production plans. In addition, national funds have been continuously injected into semiconductor equipment manufacturers, even though the level of technological development at this stage remains inferior to major manufacturers in Europe, the United States, and Japan. However, for those with modest requirements for back-end process conditions, testing, and testing equipment, China’s domestic packaging and testing equipment does have a certain proportion and scale.

For example, relevant companies such as Hangzhou Changchuan and Shanghai Raintree have invested in the automatic optical inspection instruments (AOI) and testing equipment that are required in the latter stage of packaging and testing. On the other hand, due to the relatively low threshold for research and development of back-end packaging and testing equipment, many international companies such as Japan’s Advantest and Singapore’s Besi have also set up shops in China. Chinese packaging and testing and their equipment manufacturers are essentially unaffected by relevant export bans, so the industry can still anticipate technological and revenue performance in the next few years.

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From 2020 to 2025, the compound annual growth rate (CAGR) of 12-inch equivalent wafer capacity at the world’s top ten foundries will be approximately 10% with the majority of these companies focusing on 12-inch capacity expansion, which will see a CAGR of approximately 13.2%, according to TrendForce’s research. In terms of 8-inch wafers, due to factors such as difficult to obtain equipment and whether capacity expansion is cost-effective, most fabs can only expand production slightly by means of capacity optimization, equating to a CAGR of only 3.3%. In terms of demand, the products primarily derived from 8-inch wafers, PMIC and Power Discrete, are driven by demand for electric vehicles, 5G smartphones, and servers. Stocking momentum has not fallen off, resulting in a serious shortage of 8-inch wafer production capacity that has festered since 2H19. Therefore, in order to mitigate competition for 8-inch capacity, a trend of shifting certain products to 12-inch production has gradually emerged. However, if shortages in overall 8-inch capacity is to be effectively alleviated, it is still necessary to wait for a large number of mainstream products to migrate to 12-inch production. The timeframe for this migration is estimated to be close to 2H23 into 2024.

PMIC and Audio Codec gradually transferred to 12-inch production, alleviating shortage of 8-inch production capacity

At present, mainstream products produced using 8-inch wafers include large-sized panel Driver IC, CIS, MCU, PMIC, Power Discrete (including MOSFET, IGBT), Fingerprint, Touch IC, and Audio Codec. Among them, there are plans to gradually migrate Audio Codec and some more severely backordered PMICs to the 12-inch process.

In terms of PMICs, other than certain PMICs used in Apple iPhones already manufactured at 12-inch 55nm, most mainstream PMIC processes are still at 8-inch 0.18-0.11μm. Burdened with the long-term supply shortage, IC design companies including Mediatek, Qualcomm, and Richtek have successively planned to transfer some PMICs to 12-inch 90/55nm production. However, since product process conversion requires time-consuming development and verification and total current production capacity of the 90/55nm BCD process is limited, short term relief to 8-inch production capacity remains small. Effective relief is expected in 2024 when large swathes of mainstream products migrate to 12-inch production.

In terms of Audio Codec, Audio Codecs for laptops are primarily manufactured on 8-inch wafers, and Realtek is the main supplier. In the 1H21, the squeeze on capacity delayed lead times which affected notebook computers shipments. Although the stocking efforts of certain tier1 customers proceeded smoothly in the second half of the year, these products remained difficult to obtain for some small and medium-sized customers. At present, Realtek has partnered with Semiconductor Manufacturing International Corporation (SMIC) to transfer the process development of laptop Audio Codecs from 8-inch to 12-inch 55nm. Mass production is forecast for mid-2022 and is expected to improve Audio Codec supply.

In addition to PMIC/Power Discrete, another mainstream product derived from 8-inch manufacturers is the large-sized panel Driver IC. Although most fabs still manufacture 8-inch wafers, Nexchip provides a 12-inch 0.11-0.15μm process technology used to produce large-sized Driver ICs. As production capacity at Nexchip grows rapidly, the supply of this product has been quite smooth. However, TrendForce believes that this is a special case. Mainstream large-sized Driver ICs are still manufactured on 8-inch wafers and there is no trend to switch to 12-inch wafers.

For more information on reports and market data from TrendForce’s Department of Semiconductor Research, please click here, or email Ms. Latte Chung from the Sales Department at lattechung@trendforce.com

NAND Flash prices for 1Q22 are expected to decline by 8-13% QoQ, compared to TrendForce’s previous forecast of 10-15% QoQ, primarily due to PC OEMs’ increased orders for PCIe 3.0 products and the impact of the lockdown in Xi’an on PC OEMs’ price negotiation approaches. To mitigate potential risks in logistics, NAND Flash buyers are now more willing to accept a narrower decline in contract prices in order to obtain their products sooner. However, as the Xi’an lockdown has not noticeably affected the local fabs’ manufacturing operations, the movement of NAND Flash contract prices going forward will likely remain relatively unaffected by the lockdown.

In addition, TrendForce finds that the daily number of new COVID-19 cases in Xi’an has recently undergone a noticeable drop, and the local government has also announced that that the emergency level has been downgraded. As such, Samsung’s and Micron’s local production facilities are returning to normal with respect to workforce and operational capacity. Samsung’s local production base manufactures NAND Flash products, whereas Micron’s local production base is responsible for the testing and packaging of DRAM chips as well as the assembly of DRAM modules. The impacts of the lockdown mainly relate to delays in the deliveries of memory products to customers. On the other hand, the event has not caused a tangible loss in memory production.

Lockdown in Xi’an has not caused a notable rise in NAND Flash spot prices because most spot buyers already carry a high level of inventory

Regarding NAND Flash spot prices, suppliers temporarily suspended quote offering immediately after the event due to concerns about the fallout. As a result, the general decline in NAND Flash spot prices has more or less come to a halt. However, there has been no accompanying signs of spot buyers rushing to procure more products, and the overall transaction volume remains fairly low. TrendForce’s latest survey of the spot market finds that buyers still have plenty of stock on hand and are not in a hurry to procure NAND Flash products at the prices that are currently being offered.

Decline in client SSD and UFS prices for 1Q22 is expected to narrow

Regarding the contract prices of major NAND Flash products, their overall decline has been narrower than previously expected. For instance, despite the weakening demand for Chromebooks, notebook production on the whole has been improving as component gaps become gradually resolved, while demand for commercial notebooks also provides some upward momentum for the overall shipment of notebook computers. As a result, the QoQ decline in notebook shipment for 1Q22 has been narrower compared to prior first quarters. Furthermore, lower-than-expected shipment of Intel’s latest Alder Lake CPUs, which support PCIe 4.0 interface, has led certain PC OEMs to ramp up their orders for PCIe 3.0 SSDs in order to meet their PC shipment targets for 1Q22. However, SSD suppliers have already begun gradually transitioning their material preparation to PCIe 4.0 SSD instead, thereby creating a gap between the supply and demand of PCIe 3.0 SSDs. As well, the Xi’an lockdown has prompted client SSD buyers to scramble to lock in their required delivery volumes. Taken together, these factors have lessened the decline in client SSD prices for 1Q22 from the previous 5-10% QoQ to 3-8% QoQ.

Regarding smartphones, not only has demand remained relatively sluggish, but smartphone brands are also still holding a relatively high level of eMMC/UFS inventory, meaning these brands are not particularly willing to negotiate prices for high volumes of mobile NAND Flash storage at the moment. On the other hand, thanks to increased orders from PC OEMs since November 2021, NAND Flash suppliers’ inventory levels have fallen somewhat. Hence, the decline in mobile NAND Flash storage quotes has in turn narrowed slightly. Contract prices of UFS products are now expected to decrease by 5-10% QoQ in 1Q22 instead of 8-13% QoQ as previously expected. Finally, contract prices of server SSD and NAND Flash wafers are expected to decline by 3-8% QoQ and 10-15% QoQ, respectively, in 1Q22, in line with prior expectations.

The allocation of Murata’s primary production hubs and production capacity is as follows: 56% in Japan, 36% in China, 3% in Singapore, and 5% in the Philippines, according to TrendForce’s investigations. Recently, a cluster of employees at Murata’s Fukui Takefu Plant tested positive for the COVID-19 virus. Since production diversion management had been strengthened and anti-pandemic measures implemented in advance, only some categories of production capacity have been reduced or suspended and this incident has not halted production for the entire factory. According to TrendForce, the Fukui Takefu Plant accounts for 20.7% of the company’s production capacity, mainly producing high-end consumer MLCCs. The current production reduction or suspension of some items will affect the supply of products such as servers and high-end smartphones. Fortunately, Fukui Takefu still retains 4~ 6 weeks of inventory and this incident should not tighten market supply in the short term.

Decentralized production hubs and off-site backups are major issues for MLCC suppliers after the pandemic

In addition, according to data released by the National Health Commission of the People’s Republic of China on January 17, the cumulative number of COVID-19 cases as of January 16 reached 163, including 80 in Tianjin and 9 in Guangdong, distributed among the production center of suppliers such as SEMCO, TAIYO, WALSIN, FENGHUA, and VIIYONG. The current situation will once again test the operation and risk management of MLCC suppliers as they disperse production hubs and back each other in terms of production capacity.  These plans have become an important 2-3 year strategy for MLCC suppliers.

It is worth noting that the recent pandemic outbreak in Tianjin, China is intensifying. Samsung, which is located in the Tianjin Economic-Technological Development Area, is currently operating normally. However, as the Winter Olympics opening ceremony draws near, China has stepped up its zero-COVID policy. In order to avoid a situation in which employees are unable to return to the factory due to a positive COVID test in the area where they reside, some production line employees have been temporarily living in the factory. Korean executives are also living in the factory to enhance response times to rapidly developing circumstances. In addition, the Philippines, one of the major production centers of MLCC in Southeast Asia, has also experienced a sharp increase in the number of confirmed COVID-19 cases since January this year. Murata and Samsung, who currently have factories in the region, have not reported the impact of the local pandemic and TrendForce will continue to monitor these two industry players moving forward.

Although current semiconductor process technologies have evolved to the 3nm and 5nm nodes, SoC (system on a chip) architecture has yet to be manufactured at these nodes, as memory and RF front-end chiplets are yet to reach sufficient advancements in transistor gate length and data transmission performance. Fortunately, EDA companies are now attempting to leverage heterogeneous integration packaging technologies to link the upstream and downstream semiconductor supply chains as well as various IP cores. Thanks to this effort, advanced packaging technologies, including 2.5D/3D IC and SiP, will likely continue to push the limits of Moore’s Law.

While SoC development has encountered bottlenecks, EDA tools are the key to heterogeneous integration packaging

As semiconductor process technologies continue to evolve, the gate length of transistors have also progressed from μm (micrometer) nodes to nm (nanometer) nodes. However, the more advanced process technologies are not suited for manufacturing all semiconductor components, meaning the development of SoC architectures has been limited as a result. For instance, due to physical limitations, memory products such as DRAM and SRAM are mostly manufactured at the 16nm node at the moment. In addition, RF front-end chiplets, such as modems, PA (power amplifiers), and LNA (low noise amplifiers) are also primarily manufactured at the 16nm node or other μm nodes in consideration of their required stability with respect to signal reception/transmission.

On the whole, the aforementioned memory, and other semiconductor components cannot be easily manufactured with the same process technologies as those used for high-end processors (which are manufactured at the 5nm and 3nm nodes, among others). Hence, as the current crop of SoCs is not yet manufactured with advanced processes, EDA companies including Cadence, Synopsys, and Siemens (formerly Mentor) have released their own heterogeneous integration packaging technologies, such as 2.5D/3D IC and SiP (system in package), in order to address the demand for high-end AI, SoC architecture, HPC (high performance computing), and optical communication applications.

EDA companies drive forward heterogeneous integration packaging as core packaging architecture and integrate upstream/downstream supply chain

Although the current crop of high-end semiconductor process technologies is still incapable of integrating such components as memory, RF front-end, and processors through an SoC architecture, as EDA companies continue to adopt heterogeneous integration packaging technology, advanced packaging technologies, including 2.5D/3D IC and SiP, will likely extend the developmental limitations of Moore’s Law.

Information presented during Semicon Taiwan 2021 shows that EDA companies are basing their heterogeneous integration strategies mainly on the connection between upstream and downstream parts of the semiconductor supply chain, in addition to meeting their goals through chip packaging architectures. At the moment, significant breakthroughs in packaging technology design and architecture remain unfeasible through architectural improvements exclusively. Instead, companies must integrate their upstream chip design and power output with downstream substrate signal transmission and heat dissipation, as well as other factors such as system software and use case planning. Only by integrating the above factors and performing the necessary data analysis can EDA companies gradually evolve towards an optimal packaging architecture and in turn bridge the gap of SoC architectures.

With regards to automobiles (including ICE vehicles and EVs), their autonomous driving systems, electronic systems, and infotainment systems require numerous and diverse semiconductor key components that range from high-end computing chips to mid-range and entry-level MCUs. As such, automotive chip design companies must carefully evaluate their entire supply chain in designing automotive chip packages, from upstream manufacturers to downstream suppliers of substrates and system software, while also keeping a holistic perspective of various use cases. Only by taking these factors into account will chip design companies be able to respond the demands of the market with the appropriate package architectures．

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