As the AI wave sweeps the globe, the continuous enhancement of computational power and large-scale storage capacity has become a key challenge for national infrastructure and chip companies.

Recently, Chinese chip teams have achieved significant breakthroughs in silicon photonics chips and new high-capacity storage chips, driving advancements in China’s AI and high-performance computing fields.

Chinese Research Team Achieves Breakthrough in Silicon Photonics Chips

According to reports, the Jiufengshan Laboratory (JFS) in Hubei has made milestone progress in the field of silicon photonic integration. They have successfully integrated a laser light source into a silicon-based chip, marking the first time this technology has been achieved in China. This breakthrough addresses the physical bottleneck in large data transmission between chips.

The achievement was made using JFS’s self-developed heterogeneous integration technology, involving complex processes to integrate an indium phosphide laser within an 8-inch SOI wafer. This technology often referred to as “chip light emission,” replaces electrical signals with more efficient optical signals for transmission. Its core purpose is to overcome the physical limitations of electrical signals in chip-to-chip communication.

Currently, the greatest challenge in developing fully integrated silicon photonics platforms lies in the creation and integration of high-efficiency light sources on silicon substrates.

Compared to traditional discrete external optical sources and flip-chip (FC) micro-assembly light sources, JFS’s on-chip light source technology effectively addresses issues such as low coupling efficiency, long alignment time, and insufficient alignment precision in traditional silicon photonics chips. It also overcomes bottlenecks like high production costs, large size, and difficulty in large-scale integration.

China Unveils Its Largest-Capacity Next-Generation Memory Chip

Recently, Wuhan-based company Numemory announced the successful development of China’s first largest-capacity next-generation 3D memory chip, the “NM101.”

This chip employs innovative 3D stacking technology. Based on the principle of resistance changes in new materials, using advanced processes, it integrates billions of non-volatile memory devices on a single chip, achieving a significant breakthrough in memory architecture.

Compared to other large-capacity non-volatile memory products on the market, the “NM101” chip boasts a significant advantage in storage capacity, with a single chip capable of holding up to 64 Gb. It supports random read/write operations, with both read and write speeds exceeding 10 times that of current products, while its lifespan is extended fivefold. These improvements will significantly enhance system solution performance, providing better and more efficient services for applications such as virtualization and databases.

This chip offers new large-capacity, high-density, high-bandwidth, low-latency storage solutions for Chinese data centers and cloud computing providers.

Intel’s first processor using rival TSMC’s technology, the Lunar Lake, has officially launched, intensifying the competition with AMD. According to a recent report by TechNews, third-party testing has confirmed Intel’s claims: Lunar Lake is indeed the most energy-efficient x86 processor to date, outperforming Qualcomm’s Snapdragon X and even rivaling Apple’s M3, reminiscent of Apple’s groundbreaking M1 launch.

TechNews attributes this success not only to Intel’s redesign of power supply, frequency regulation, and packaging but also to the advanced TSMC N3B process.

Recently, Intel announced that in order to reduce costs and better prepare for its in-house 18A process, it has decided to abandon the introduction of the 20A process. As a result, the Arrow Lake chip launching this month will also use TSMC’s process. TechNews raised the question in their article: “With Intel’s new platforms expected to rely on TSMC’s process at least until 2026, will AMD face significant challenges?”

Can AMD’s Zen 5 architecture turn the tide?

TechNews noted that AMD’s current advantage over Intel rests heavily on using TSMC’s process. However, AMD is not alone in benefiting from TSMC’s power efficiency. Across the board, chips produced with TSMC technology have demonstrated superior energy efficiency, delivering high performance without consuming excessive power. But, with the efficiency gains from advanced nodes like M4 or A18 nearing their limits, chipmakers will need to adopt more aggressive power and frequency strategies to push performance further.

Lunar Lake’s impressive energy efficiency highlights both TSMC’s process advantage and Intel’s enduring design prowess. This should serve as a warning for AMD, which plans a major push into the laptop market in 2025. With the launch of Strix Point and Hawk Point this year, AMD aims to release five new platforms next year, targeting the mid-to-high-end laptop market. However, reviews of Strix Point already show that, while performance has improved, energy efficiency remains stagnant—a problem that could persist with future Zen 5-based products.

This opens a window of opportunity for Arrow Lake, which is now powered by TSMC’s process. If Arrow Lake can offer higher peak performance than Raptor Lake Refresh or Meteor Lake while maintaining strong energy efficiency—and with better OEM partnerships—AMD’s hard-earned foothold in the mid-to-high-end market may once again be overshadowed by Intel.

Facing competition shifts due to process changes is nothing new for AMD. As mentioned in the TechNews report, when NVIDIA launched the RTX 30 series on Samsung’s 8LPU (8nm) process, early issues with leakage and high power consumption gave AMD’s RX 6000 series GPUs, known for their superior performance and energy efficiency, a competitive edge. The high-end 6800 and 6900 models were even able to compete with NVIDIA’s RTX 3080. However, once NVIDIA returned to TSMC for the RTX 40 series, AMD struggled to keep up and eventually abandoned its high-end GPU plans, shifting focus to niche markets.

TechNews concludes that while next year may see the lowest degree of processor process diversity—since almost everyone is using TSMC—it will also be a critical year to evaluate the true design strengths of each semiconductor company. With AMD’s Zen 5 already on the table, all eyes are now on Intel’s Arrow Lake to see what surprises it brings to the market with TSMC’s technology.

(Photo credit: AMD)

Rumors suggest that Samsung’s upcoming Galaxy S25 models will adopt a dual-chipset strategy by adopting MediaTek’s Dimensity 9400. This approach is intended to lessen the company’s dependence on Qualcomm and to reduce its chipset costs, according to a report from Wccftech.

While neither Samsung nor MediaTek have confirmed this information, it may have been inadvertently revealed by Google in its blog post, Wccftech notes. In a blog article released by Google DeepMind at the end of September, the progress of AlphaChip, which is the AI division of Google, was discussed, emphasizing how it accelerates and optimizes chip design.

Notably, the article suggests the potential collaboration between Samsung and MediaTek, according to Wccftech.

Although the article does not explicitly mention MediaTek’s Dimensity 9400 or the Galaxy S25 series, it does mention the Dimensity Flagship 5G. This could imply the Dimensity 9400 and the Galaxy S25 series, since the Galaxy S24 series does not currently feature any high-end MediaTek chipsets.

As per a report from TechNews, the Dimensity 9400 has been officially launched today (October 9th), while the Galaxy S25 series is expected to be unveiled early next year, aligning with the details mentioned in the blog article released by Google DeepMind.

It is worth noting that Samsung is initially expected to integrate some of the new Galaxy S25 models with its own Exynos 2500. However, according to Wccftech, due to the unstable yield rates of the 3 nm GAA process, Samsung not only struggled to attract potential consumers but also faced the possibility of delaying the launch schedule for its new flagship chipset.

Nevertheless, as suggested by Wccftech, the Exynos 2500 might not be abandoned. Rumors indicate that it might be used in its ‘price to performance’ Galaxy S25 FE, along with its future foldable smartphones.

Read more

• [News] MediaTek Dimensity 9400 Debuts: All-Big-Core and TSMC 3nm Challenge Qualcomm, Apple
• [News] Samsung’s Memory and Smartphone Divisions Reportedly Eye Collaboration with TSMC and MediaTek
• [News] Despite 3nm Issues, Samsung Plans to Speed up 2nm/1.4nm Expansion Next Year

(Photo credit: Samsung)

Lisa Su of AMD recently celebrated a decade as CEO, a remarkable journey that has transformed the company from a challenging position into one of the most influential players in the AI landscape.

10 years ago I had the honor of a lifetime to be named @AMD CEO. It’s been an incredible journey with so many proud moments. Today I want to thank the global @AMD team for all you do. As amazing as the last 10 years have been, the best is yet to come. 🥰 pic.twitter.com/WuQRt3xlX3

— Lisa Su (@LisaSu) October 8, 2024

When Lisa Su first joined AMD, the company was on the brink of bankruptcy, having laid off nearly a quarter of its workforce, while its stock price had plummeted to just USD 2.

Su’s achievements at AMD are numerous, particularly her revamp of the product portfolio. The reforms she implemented as CEO significantly shaped the company’s future success.

Notably, as reported by CNN, when Su first took the position as CEO of AMD, she decided not to pursue technology for mobile phones or Internet of Things sensors, recognizing that while these areas are promising, they are not AMD’s core competencies.

(Photo Credit: AMD)

According to TrendForce’s latest memory spot price trend report, regarding DRAM, trading volumes in the spot market continues to fall during China’s National Day Golden Week, while a rebound is unlikely before the year’s end. As for NAND flash, buyers’ reluctance towards procurement has further exacerbated the excessive provision within the market. Details are as follows:

DRAM Spot Price:

It is now China’s National Day Golden Week, so trading volumes in the spot market continues to fall. Furthermore, some module houses are keen to lower their inventory levels, thus pushing spot prices to go down further. The supply-demand dynamics of the spot market remains unchanged, and a rebound is unlikely before the year’s end. The average spot price of mainstream chips (i.e., DDR4 1Gx8 2666MT/s) has dropped by 0.26% from US$1.934 last week to US$1.929 this week.

NAND Flash Spot Price:

The spot market was seen with sluggishness in transactions as buyers had not raised their willingness in stocking amidst the National Day holiday of China. Several suppliers are obviously selling their products at lower unit prices this week as sales pressure continues to envelop the entire market, which however has yet to alleviate the overall status, where buyers’ reluctance towards procurement has only further exacerbated the excessive provision within the market. Spot prices of 512Gb TLC wafers have dropped by 0.58% this week, arriving at US$2.595.