Semiconductor giants like Intel, TSMC, Samsung and Micron have received huge amount of grants from the U.S. government, funded through the CHIPS and Science Act. However, chip making equipment maker Applied Materials is said to be in a different scenario. According to reports by Bloomberg and Tom’s Hardware, the company’s application to gain U.S. funding for a USD 4 billion R&D center in Silicon Valley was rejected by U.S. Department of Commerce.

The reports note that Applied Materials had announced plans to build the facility a year ago, as it tried to seek government subsidies through the CHIPS and Science Act. The facility was scheduled for completion in 2026.

However, according to sources familiar with the matter, Commerce Department officials turned down the plan on Monday, stating that project did not meet the eligibility criteria, Bloomberg reports. This decision marks a major setback for the company’s efforts to establish a significant facility in Silicon Valley, which it aims to develop next-generation chip making tools.

In addition, though it is reported that as there are over 670 companies with interests in the gaining the fund under the CHIPS and Science Act, and the Commerce Department has warned that limited resources will force it to reject many applications, the rejection of Applied Materials’ project is particularly unexpected. For it is a U.S. semiconductor company, and the project closely aligns with the Biden administration’s goals of revitalizing the domestic semiconductor industry.

It is worth noting that though the U.S. keeps tightening the export controls on the semiconductor sector, major chip equipment makers seem to become increasingly dependent on the Chinese market. From February to April, China accounted for 43% of the total sales of Applied Materials, a 22 percentage point increase YoY.

Applied Materials has reportedly received subpoenas from the US Securities and Exchange Commission as well as the US Attorney’s Office of the District of Massachusetts in February, and said to be under investigation for allegedly sending equipment to SMIC, China’s leading chip maker, through South Korea without export licenses.

The CHIPS and Science Act, signed into law in August 2022, allocated approximately USD 280 billion in new funding to enhance domestic chip making research and development.

Previously, the U.S. government announced that Intel would receive USD 8.5 billion in federal subsidies and USD 11 billion in loans. On the other hand, US administration is set to provide USD 6.6 billion and USD 6.4 billion in aid to TSMC and Samsung, respectively.

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• [News] US Reportedly Expands Investigation into Applied Materials, Possibly due to Concerns of Shipments to SMIC
• [News] China Contributes Over 40% of U.S. Chip Equipment Makers’ Revenue despite Export Controls

(Photo credit: Applied Materials)

Intel not only reported earnings and forecasts that fell short of Wall Street expectations but also announced plans to cut more than 15% of its workforce, halt dividend payments for Q4 2024 (October-December), and reduce its full-year capital expenditure forecast by more than 20%.

According to Intel’s official announcement, its Q2 (April-June) earnings: adjusted earnings per share were $0.02, far below the analyst estimate of $0.10; revenue decreased by 1% year-over-year to USD 12.83 billion, missing the market expectation of USD 12.94 billion; and adjusted gross margin was 35.4%

During Q2, Intel’s Client Computing Group, responsible for producing PC processors, saw its revenue increase by 9% year-over-year to USD 7.41 billion, meeting the market expectation of USD 7.42 billion. However, the revenue from the Data Center and AI Group fell by 3% year-over-year to USD 3.05 billion, missing the market expectation of USD 3.14 billion.

Intel stated that sales of PC chips capable of handling AI tasks exceeded internalAI expectations, with shipments expected to surpass 40 million units in 2024.

Looking ahead to Q3, Intel forecasts revenue between USD 12.5 billion and USD 13.5 billion and an adjusted loss per share of $0.03. According to a report from Reuters citing an LSEG survey, analysts had originally predicted Q3 revenue to reach USD 14.35 billion with an adjusted earnings per share of $0.31. Intel’s adjusted gross margin for the quarter is expected to be 38%.

Intel CEO Pat Gelsinger stated that the latest layoff plan will affect about 15,000 employees. This is the largest single layoff action tracked by tech layoff monitoring site Layoffs.fyi since it began operations in March 2020. Intel currently employs around 110,000 people, meaning over 15% of its workforce will be impacted.

Gelsinger further pointed out that Intel must align its cost structure with the latest operational model and fundamentally change the way the company operates. He indicated that Intel’s revenue growth has not met expectations and has not yet benefited from powerful trends such as AI.

According to Intel’s statement, Intel will suspend dividend payments starting in Q4 until cash flow improves significantly. Since 1992, Intel has consistently paid dividends without interruption.

Intel has also decided to reduce its total capital expenditure budget for new plants and equipment in 2024 by over 20% to between USD 25 billion and USD 27 billion. The estimated total capital expenditure for 2025 will be between USD 20 billion and USD 23 billion.

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• [News] Intel Hires Micron Executive to Lead Its Foundry Business
• [News] Intel Suspended Investment in French and Italian Chip Plants

(Photo credit: Intel)

As the battle of HBM intensifies between memory giants, the competition of NAND is also heating up. According to a report by Korean media outlet etnews, SK hynix is developing 400-layer NAND flash memory, aiming to get the technology ready for mass production by the end of 2025.

Citing sources familiar with the matter, the report notes that SK hynix is currently working with supply chain partners to develop process technologies and equipment needed for 400-layer and above NANDs. As the company plans to apply hybrid bonding to achieve the breakthrough, many packaging materials and components suppliers are expected to enter the new supply chain.

According to the report, SK hynix is reviewing new materials for bonding and various technologies for connecting different wafers, including polishing, etching, deposition, and wiring. With the goal of getting the technology and infrastructure ready by the end of next year, full-scale production for the 400-layer NAND is anticipated to begin in the first half of 2026.

Currently, the Big Three in the memory sector are all trying to push the boundaries on the layers of NAND. Earlier in April, Samsung confirmed that it has begun mass production for its one-terabit (Tb) triple-level cell (TLC) 9th-generation vertical NAND (V-NAND), with the number of layers reaching 290. For now, the company aims to stack V-NAND to over 1000 layers by 2030.

Micron, on the other hand, has announced the 2650 client SSD, its first product built from 276-layer 3D NAND on July 30^th. Japanese memory chipmaker Kioxia, after successfully increasing the number of 3D NAND layers to 218 in 2023, even stated that achieving a 1,000-layer level by 2027 would be possible.

In August, 2023, SK hynix showcased its sample of the world’s first 321-layer NAND product. Now, as the limit is expected to be pushed up to 400 layers, the company plans to apply hybrid bonding to the manufacturing, which adopts a “wafer-to-wafer” (W2W) structure, etnews notes.

According to the report, until now, SK hynix has been stacking cells on top of the peripherals, the driving circuit area, using the method of “Peripheral Under Cell (PUC)” to manufacture NAND. The structure is similar to a mixed-use high-rise apartment where the peripheral (commercial space) is at the bottom and the cells (residential units) are stacked on top.

However, as the number of NAND layers increases, the peripheral is prone to be damaged during the cell stacking process due to the high heat and pressure generated during the cell process, the report explains.

Therefore, SK hynix plans to apply hybrid bonding to overcome the issues. By implementing cells and peripherals on separate wafers and then bonding the two wafers together, the method allows the peripheral wafer that drive the cells to be separately manufactured, thus enabling a stable increase in NAND layers.

Regarding the progress on the development of 400-layer NAND, SK hynix stated that it cannot confirm details about its technology development or mass production timeline, the report notes.

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• [News] SK Hynix Plans to Manufacture 3D NAND over 400 Layers at -70°C with the Help of TEL
• [News] Outpacing Samsung or the End of Race? Kioxia Aims 1000-layer NAND by 2027

(Photo credit: SK hynix)

On July 31, IQE plc, the global supplier of compound semiconductor wafer products and advanced material solutions, announced the planned initial public offering (IPO) of the Group’s Taiwanese operating subsidiary (IQE Taiwan) on the Taiwan Stock Exchange (TWSE).

The Group intends to list IQE Taiwan on the TWSE and to sell a minority shareholding through a public offering, but it plans to retain control of IQE Taiwan and will continue to leverage its strategic value, with the proceeds of the public offering intended to be utilized across the Group to fund the growth strategy.

Currently, the IPO process is at an early stage, and IQE has engaged Taishin Securities Co. Ltd as its financial advisor to assist in preparing IQE Taiwan for the IPO. IQE explained that the IPO will be proceeded in two stages.

For the initial phase, IQE Taiwan is expected to be listed on the Emerging Market Board in 1H25, subject to usual regulatory procedures and requirements. Further transaction details and information regarding the process will be disclosed as appropriate.

As IQE is capitalizing on the market opportunities ahead, including in GaN Power, the company considers the listing of its Taiwan subsidiary as an exciting opportunity for the entire group, which will accelerate IQE’s investment in its strategy for growth.

Once the subsidiary is successfully listed, IQE is expected to maximize asset value and ensure supply reliability and flexibility for its global customers.

It’s worth noting that aside from IQE, GaN IDM Innoscience is promoting its IPO process on the Hong Kong Stock Exchange while TASC has spun off its subsidiary responsible for 8-inch GaN business and promoted its listing on TWSE, which all reflect the fact that GaN power semiconductor technologies are gaining traction, particularly with the development of AI server and low-altitude economy sectors.

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• [News] Hong Kong Kicked-off Construction of the First GaN Epi-Wafer Pilot Line
• [News] SK keyfoundry Advances in GaN Power Semiconductors, Reportedly Producing for Tesla Soon

(Photo credit: IQE)

Japanese NAND flash giant Kioxia announced today (August 1st) that the building construction of Fab2 (K2) of its Kitakami Plant in Iwate Prefecture was completed in July. As demand is recovering, the company will gradually make capital investments while closely monitoring flash memory market trends. Kioxia plans to start operation at K2 in the fall of Calendar Year 2025, according to its press release.

A portion of investment for K2 will be subsidized by the Japanese government according to the plan approved in February 2024, according to Kioxia.

In addition, the company notes that some administration and engineering departments will move into a new administration building located adjacent to K2 beginning in November 2024 to oversee the operation of K2.

According to a report from Nikkei on July 31, Kioxia’s Kitakami Plant started production in 2020,with the construction of K2 began in 2022. Initially, K2 was scheduled to commence production in 2023.

However, due to a downturn in the memory market and weak demand for NAND Flash used in smartphones and PCs, Kioxia started to reduce production in October 2022, with the extent of production cuts exceeding 30%. As part of these production reduction measures, Kioxia postponed the production start of the K2 facility.

Nikkei’s report further indicates that with market conditions recovering, Kioxia ended its production cuts in June 2024, and the current production line utilization rate has returned to 100%.

To mass-produce advanced memory products, Kioxia, in collaboration with Western Digital (WD), plans to invest a total of 729 billion yen in the Yokkaichi and Kitakami plants, with the Japanese government providing up to 243 billion yen in subsidies.

The Kitakami plant will produce the most advanced “8th generation” memory, with a monthly production capacity of 25,000 wafers. These will be used in AI data centers, as well as in smartphones, PCs, and automotive applications.

On June 26, according to industry sources cited in a report from Reuters, Kioxia plans to submit an initial public offering (IPO) application to the Tokyo Stock Exchange in the near future, aiming to go public by the end of October. Sources indicate that Kioxia will submit its official IPO application by the end of August, with a target listing date at the end of October.

Read more

• [News] NAND Flash Giant Kioxia Reportedly Plans IPO by Late October amid Market Recovery
• [News] Kioxia Optimistic about NAND Market Sentiment; Price Hike Expected in Q2

(Photo credit: Kioxia)