According to a report from Economic Daily News, benefiting from the upcoming peak season for smartphones, a recovery in the PC market, and a more than 30% surge in silver prices this year, global giants such as Murata and TDK are planning to raise product prices. Targeted products include multilayer inductors and beads, with potential price hikes of up to 20%, marking a rare significant increase in the passive component industry in recent years.

Industry sources cited by the same report have noted that the passive components sector, after undergoing inventory adjustments for over one year, is now seeing inventory levels returning to healthy levels. This, coupled with customers replenishing stocks, the traditional peak season approaching, and significant cost increases, presents an opportunity for rare price hikes in products such as multilayer inductors and ferrite beads.

Industry sources cited by the report also highlight that silver accounts for up to 60% of the cost in manufacturing multilayer inductors and beads. With silver prices having surged nearly 40% at one point this year and still up 35% year-to-date despite a recent slight pullback, manufacturers are facing substantial cost pressures in mass-producing these components.

Leading global inductor manufacturers include Japanese companies like Murata, TDK, and Taiyo Yuden, as well as Taiwan’s Yageo and Walsin Technology groups. With major smartphone manufacturers launching new models in the second half of the year, the recovering PC market, and rising silver prices, industry sources indicate that top-tier companies like Murata and TDK may increase prices for multilayer inductors and beads. Large-size products are expected to see the first price hikes, ranging from 10% to 20%.

Industry sources further explain that multilayer inductors are characterized by magnetic shielding, which eliminates electromagnetic interference and effectively suppresses high-frequency oscillations in circuits. This makes them highly suitable for high-density circuit designs. Depending on their size, these inductors are widely used in consumer electronics and even servers.

On the other hand, ferrite beads are designed using ferrite materials and a multilayer manufacturing process. Their impedance varies with frequency, meaning they achieve high impedance at high frequencies, offering superior high-frequency filtering characteristics. This effectively suppresses noise interference, making them suitable for end products like smartphones, tablets, laptops, and power supplies.

Reportedly, the operations of passive component manufacturers have been gradually recovering. Leading passive component manufacturer Yageo is optimistic, noting that customer inventory levels are becoming healthier this quarter. The company expects its capacity utilization rate to continue increasing and holds an optimistic outlook for the market moving forward.

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(Photo credit: YAGEO)

Though Samsung has denied the rumor that its HBM3e passed NVIDIA’s qualification tests, multiple Taiwanese companies in the supply chain reportedly learned that the product is expected to receive certification soon, and will start shipping in Q3. As memory manufacturers are said to shift at least 20-30% of their production capacity to HBM, tightening supply further, DDR5 prices in Q3 will reportedly be on the rise.

It is reported that some of Samsung’s supply chain partners have recently received information to place orders and reserve capacity as soon as possible, which indicates the memory giant’s HBM may begin shipments smoothly in the second half of the year. The move may also imply that the internal capacity allocation within Samsung will accelerate, shifting the focus of production lines to HBM.

Taiwanese memory supply chain sources reportedly believe that the news of Samsung’s HBM certification is likely to be confirmed at the upcoming Samsung financial report meeting, which will take place on July 31. It is said that memory manufacturers will relocate at least 20-30% of their production capacity, driving DDR5 prices to rise.

TrendForce notes that a recovery in demand for general servers—coupled with an increased production share of HBM by DRAM suppliers—has led suppliers to maintain their stance on hiking prices. As a result, the ASP of DRAM in Q3 is expected to continue rising, with an anticipated increase of 8–13%. Due to high average inventory levels of DDR4 among buyers, purchasing momentum will be focused on DDR5.

On the other hand, regarding NAND prices in Q3, TrendForce reports that while the enterprise sector continues to invest in server infrastructure, the consumer electronics market remains lackluster. This, combined with NAND suppliers aggressively ramping up production in the second half of the year, is likely to curb the blended price hike to a modest 5–10%.

According to TrendForce’s latest analysis, Samsung’s initial plan to pass NVIDIA’s certification in Q2 was delayed, making it falling behind SK hynix and Micron. Simultaneously, some HBM suppliers also faced lower-than-expected production yields, leading to concerns about a shortage of HBM3e 8hi materials for the H200 GPU shipments starting in Q2 2024.

However, Samsung adjusted its 1alpha nm front-end production process and back-end stacking process in the first half of 2024, leading the industry to expect that sample production could be completed in Q3 2024, followed by product certification.

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(Photo credit: Samsung)

Recently, Reuters reported that SoftBank Group acquired Graphcore, a company often referred to as the “UK’s NVIDIA,” though the amount of the deal was not disclosed. Graphcore is a startup in the field of artificial intelligence (AI) that has designed a new type of Intelligent Processing Unit (IPU). In certain model tests, its performance has surpassed that of NVIDIA’s GPU systems, and thus, the industry is optimistic about its potential to compete with NVIDIA’s GPU.

• The Differences between IPU and GPU

As a processor specifically designed for AI computation, also known as an AI processor, IPU is excels in fields such as deep learning, machine learning, and natural language processing, boasting the capability of accelerating various AI-related tasks.

GPU, on the other hand, was initially designed to meet the demands of graphics rendering and image processing. With the rapid proliferation of AI and big data technologies, high-performance GPU, known for their powerful parallel processing capabilities, can handle multiple data points and tasks simultaneously, thereby speeding up training and inference processes, which together enable GPU to be gradually applied in the AI field, particularly in deep learning and machine learning.

Although both IPU and GPU can be used in the AI domain, they differ a lot in several aspects, such as computational architecture and memory architecture.

Previously, Lu Tao, the President and General Manager of Greater China at Graphcore, explained that the Graphcore C600 has 1,472 processing cores per IPU, capable of running 8,832 independent program threads in parallel. In comparison, NVIDIA’s GPU SM Core (Stream Multiprocessor Core) has around 100 cores, varying with different product configurations.

In terms of memory architecture, NVIDIA’s GPUs have a two-level memory structure. The first level consists of around 40-50 MB of memory within the chip, with external HBM or VRAM attached. Graphcore’s IPU, however, contains 900 MB of on-chip SRAM storage, which is distributed.

Lu summarized that the IPU’s architecture shows greater advantages for tasks with high requirements for sparsity and high dimensions relative to to GPU. For matrix operations, its performance might be similar to GPU or slightly less competitive.

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(Photo credit: Graphcore)

Though the U.S. keeps tightening the export controls on the semiconductor sector, major chip equipment makers seem to become increasingly dependent on the Chinese market. According to a report by Nikkei, citing financial data such as Applied Materials and Lam Research, China’s share of sales have exceeded the threshold of 40%.

According to the latest forecast by SEMI, the global chip equipment sales are expected to grow by 3.4% to USD 109 billion in 2024, with China anticipated to reach a record-high USD 35 billion, accounting for over 30% of the global market.

The strong demand of China is also reflected in the sales of major U.S. chip equipment makers. Citing the latest financial data, Nikkei notes that from February to April, China accounted for 43% of the total sales of Applied Materials, a 22 percentage point increase YoY.

Similarly, from January to March, China accounted for 42% of the total sales of KLA Corporation, a 20 percentage point increase YoY.

The development appears to contradict Washington’s export control plans targeting China. In 2022, the US government restricted the export of advanced semiconductor production equipment to curb Beijing’s progress in this field. However, the manufacturing equipment for traditional chips above 28nm is not subject to these controls.

Citing sources familiar with the matter, Nikkei states that if it was not because of the regulation, the proportion of their business in China would be even higher, with sales growth in China occurring only in the non-advanced equipment sector.

The report also notes that though Washington’s policy of building a local ship supply chain does seem to benefit U.S. equipment manufacturers, they still find it difficult to reduce the reliance on China. In 2023, the U.S. accounted for 15% of Applied Materials’ total revenue, up 6 percentage points from 2021.

In order to confront the semiconductor sanctions from the U.S., China has been doubling down on the efforts by setting up its largest-ever semiconductor state investment fund. Earlier in May, it established the third phase of the National Integrated Circuit Industry Investment Fund, with investment totaling USD 47.5 billion.

The aim for China’s Big Fund is to leverage fiscal funds to attract private capital, focusing on key segments of the integrated circuit industry chain, including chip design, manufacturing, packaging and testing.

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(Photo credit: Applied Materials)

With the surge in new applications like AI, advanced packaging remains a hot topic, particularly with FOPLP (Fan-Out Panel Level Packaging) technology gaining renewed attention. According to sources cited by a report from MoneyDJ, leading semiconductor foundry TSMC has officially formed a team, currently in the “Pathfinding” phase, and is planning to establish a mini line with a clear goal of advancing beyond traditional methods.

TSMC introduced the FOWLP (Fan-Out Wafer Level Packaging) technology named InFO (Integrated Fan-Out) in 2016, first used in the iPhone 7’s A10 processor. Subsequently, assembly and testing facilities actively promoted FOPLP solutions, looking to attract customers with lower production costs, yet faced ongoing technical challenges. Therefore, current terminal applications remain within mature processes, such as PMIC (Power Management IC) products.

However, per the sources cited by the same report, TSMC’s move to transition advanced packaging technology from wafer level to panel level is more than just talk—it’s becoming a reality. It is reported that TSMC is planning to use rectangular substrates measuring 515mm by 510mm, with a dedicated team already conducting research and planning to establish a mini line.

The source further mentioned that, TSMC’s development of FOPLP can be seen as a rectangular version of InFO, offering advantages such as lower unit costs and larger package sizes.

This advancement could further integrate other technologies on TSMC’s 3D fabric platform, paving the way for 2.5D/3D advanced packaging solutions to serve high-end product applications. This approach could be regarded similar to a rectangular CoWoS, currently targeted at the AI GPU sector with NVIDIA as a customer. If progress continues smoothly, these developments could potentially debut between 2026 and 2027.

On the AMD front, it is understood that their initial partners for FOPLP are ASE Technology and PowerTech Technologies, with potential applications in PC or gaming console chips. Reportedly, it’s suggested that previous packaging methods for PCs and gaming consoles primarily used FC-BGA, but upcoming new products may potentially upgrade to CoWoS level.

Sources cited by the report note that in the early stages of FOPLP, players like PowerTech Technologies, Innolux, and ASE Technology faced challenges and intermittent demand. To allocate resources effectively, equipment suppliers have been conservative in their investments in related fields, focusing mainly on adjusting specifications to meet customer demands. With TSMC now officially joining, equipment suppliers are shifting to a more proactive stance in preparation for upcoming developments.

In summary, the development of the FOPLP ecosystem hinges largely on TSMC’s role. TSMC is expected to maintain leadership in the high-end segment, while packaging and testing firms will cater to the mid-to-high-end markets. Semiconductor experts believe that in the realm of high-speed computing, CoWoS will remain mainstream for the next 3 to 5 years, with advanced 3D packaging like SoIC gaining prominence in high-end applications, solidifying TSMC’s position as a key player.

For packaging and testing companies, the key lies in product upgrades that offer cost-effectiveness. The success of FOPLP as the next generation of advanced packaging hinges on how chip manufacturers position their products, address yield issues related to warpage, and ensure overall performance and pricing that justify customer investment.

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(Photo credit: TSMC)