According to TrendForce’s latest memory spot price trend report, regarding DRAM spot prices, since inventory levels are not excessively high, the selling pressure remains manageable. DDR4 products, though, have been suffering from the downward pressure more than DDR5. As for NAND flash, the spot market continues to sustain repercussions of sluggishness among consumer products. A number of brands are now pessimistic regarding how this wave of market enervation would persist until 1H25. Details are as follows:

DRAM Spot Price:

Due to an underwhelming peak season, spot sellers are under pressure to offload inventory, leading to a slight sell-off. However, since inventory levels are not excessively high, the selling pressure remains manageable. Meanwhile, Samsung has recently begun releasing reball DDR5 chips stripped from decommissioned modules at low prices. For instance, 2Gx8 (16Gb) chips are being sold for around US$3, contributing to the overall decline in spot prices. For DDR4 products, the plentiful supply of reball chips is exerting even more downward pressure compared with DDR5 products. Consequently, there is no sign of stabilization in spot prices. The average spot price of the mainstream chips (i.e., DDR4 1Gx8 2666MT/s) slightly decreased by 0.05% from US$1.973 last week to US$1.972 this week.

NAND Flash Spot Price:

The spot market continues to sustain repercussions of sluggishness among consumer products, where lackluster transactions are seen from client SSD, embedded products (eMMC & UFS), and memory cards. A number of brands are now pessimistic regarding how this wave of market enervation would persist until 1H25. Spot prices, compared to last week, have been continuously dropping at a small margin. Spot prices for 512Gb TLC wafers have dropped by 0.81% this week, arriving at US$3.185.

Amid the escalating tech war between China and the US, along with rising geopolitical tensions, China has accelerated its import of chip manufacturing equipment since the middle of last year to counter potential US chip sanctions, with Dutch company ASML and Japanese company Tokyo Electron (TEL) benefited the most.

Notably, according to the Semiconductor Equipment and Materials International (SEMI), despite US sanctions preventing China from acquiring advanced EUV lithography equipment from ASML, it reported that China’s spending on chip manufacturing equipment has reached USD 25 billion in the first half of this year, exceeding the combined total of Korea, Taiwan, and the US. SEMI data also shows that China’s spending remained strong in July and is expected to set a new annual record.

Meanwhile, per the trade data from China’s General Administration of Customs cited by Bloomberg, from January to July this year, Chinese companies imported chip manufacturing equipment worth nearly USD 26 billion, surpassing the previous record set in the same period in 2021.

SEMI projects that China will become the largest investor in new fab construction, including equipment purchases. It is expected that the country’s total spending on chip equipment for the entire year of 2024 will reach USD 50 billion.

Clark Tseng, SEMI’s senior director of market intelligence, further highlighted that at least more than 10 tier-two chip manufacturers are actively purchasing new equipment, which is driving China’s overall spending.

China is now reportedly the largest market by revenue for top global chip equipment suppliers. The latest quarterly financial reports from companies such as Applied Materials, Lam Research, and KLA show that China contributes approximately 40% of their revenue.

For Japanese company TEL and Dutch company ASML, the contribution from the Chinese market is even more significant, with nearly half of their revenue coming from China.

Additionally, per a report from Commercial Times, amid a global economic slowdown, China is the only region where chip manufacturing equipment spending increased in the first half of this year compared to the same period last year.

Tseng also noted that SEMI anticipates spending on new plant construction in China will “normalize” over the next two years.

Read more

• [News] China’s Import of Chip Making Equipment Hit New High This Year, with Mature Nodes Driving the Demand
• [News] China Contributes Over 40% of U.S. Chip Equipment Makers’ Revenue despite Export Controls

(Photo credit: iStock)

Among memory giants which are accelerating their development of next-gen HBM amid the AI boom, SK hynix, NVIDIA’s major HBM supplier, is at the forefront as it dominates the market. According to Kangwook Lee, Senior Vice President and Vice President of Packaging, though it might be the case that certain startups would choose to forgo HBM in their AI chip design due to cost considerations, high-performance computing products still require HBM, a report by Technews notes.

Lee’s attendance marks the first time SK hynix has delivered a keynote speech in SEMICON Taiwan, as he gave a presentation on September 3rd at the Heterogeneous Integration Global Summit, sharing the company’s observation on HBM trends in the future. Here are the key takeaways complied by Technews.

Customized HBM Will Be the Future

Citing Lee’s remarks, the report states that customization will be a crucial trend in the HBM sector. Lee further noted that the major difference between standard and customized HBM lies in the base logic die, as customers’ IPs have been integrated. The two categories of HBMs, though, share similar core dies.

TrendForce also predicted that HBM industry will become more customization-oriented in the future. Unlike other DRAM products, HBM will increasingly break away from the standard DRAM framework in terms of pricing and design, turning to more specialized production.

SK hynix has been in collaboration with TSMC to develop the sixth generation of HBM products, known as HBM4, which is expected to enter production in 2026. Unlike previous generations, which were based on SK hynix’s own process technology, HBM4 will leverage TSMC’s advanced logic process, which is anticipated to significantly enhance the performance of HBM products, while enabling the addition of more features in the meantime.

SK hynix: Chiplet to Be Applied Not Only in HBM But in SSD

Regarding the challenges of HBM in the future, Lee mentioned that there are many obstacles in packaging and design. In terms of packaging, the main challenge is the limitation on the number of stacked layers.

According to Lee, SK hynix is particularly interested in directly integrating logic chips with HBM stacks. On the other hand, customers are also showing interest in 3D System-in-Package (3D SIP) technology. In sum, 3D SIP, memory bandwidth, customer need alignment and collaboration will be among the challenges going forward.

Per a report by Korean media outlet TheElec, SK hynix intends to integrate the chiplet technology into its memory controllers over the next three years to improve cost management, which means that parts of the controller would be manufactured with advanced nodes, while other sections will use legacy nodes.

In response, Lee stated that this technology will be used not only for HBM but also for SSD SoC controllers.

When asked about whether some startups might choose to forgo HBM in AI chip design due to cost considerations, Lee responded that it largely depends on the product application. Some companies claim that HBM is too expensive, so they may seek alternative solutions without HBM. High-performance computing products, on the other hand, still require HBM.

Read more

• [News] SK hynix Reportedly to Tape-out HBM4 in October, Paving the Way for NVIDIA’s Rubin
• [News] SK Hynix President to Join Semicon Taiwan, Bolstering HBM Partnership with TSMC and NVIDIA

(Photo credit: SK hynix)

TSMC, along with research teams like imec, continues to push the boundaries in pursuit of optimal solutions for achieving high bandwidth and low power consumption on the same chip area.

As per a report from Commercial Times, Imec has even mapped out a blueprint for the Angstrom era, with the potential to surpass the A1 threshold by 2040. They have also revealed that the A14 node will require the adoption of High-NA EUV (Extreme Ultraviolet Lithography with High Numerical Aperture), reportedly hinting that TSMC’s adoption of High-NA EUV is inevitable.

Per another report from the Economic Daily News, Luc Van den hove, President and CEO of imec, presented imec’s latest technological roadmap at the ITF Taiwan 2024 forum. He outlined plans to advance to the 2nm node by 2025, enter the angstrom era with the A14 process by 2027, and reach the A2 process by 2037.

He also explained the changes in imec’s transistor architecture, stating that the 2nm process will transition from FinFET to Nanosheet architecture, while the A7 process will further shift to complementary FET (CFET) architecture.

This, per Commercial Times’ report, hints that TSMC’s adoption is only a matter of time. TSMC emphasized that whenever new structures and tools, such as High-NA EUV, emerge, they carefully evaluate their maturity, costs, schedules, and feasibility.

Min Cao, Vice President of R&D at TSMC, pointed out that the performance, power, and area (PPA) gains from field-effect transistors (FETs) are diminishing. To sustain high growth, TSMC does not rule out the development of emerging materials.

He further expressed optimism about the significant growth wave driven by artificial intelligence, noting that the complexity of AI models and computational power is expected to grow exponentially.

Min Cao noted that the automotive sector will soon adopt 3nm and 5nm chips, and TSMC will be able to support the advancement of autonomous driving. He estimated that the semiconductor market will reach a scale of USD 1 trillion by 2030.

Read more

• [News] TSMC’s Expansion beyond 2nm Taking Shape? Angstrom-Class Fabs Possibly in Southern Taiwan
• [News] Decipher TSMC’s Calm Take on High-NA EUV Lithography Machines: Who May Have the Last Laugh in the Angstrom Era?

(Photo credit: TSMC)

Recently, wafer foundry market has seen various dynamics from related manufacturers.

TSMC is reportedly planning to build its third plant in Japan, while Samsung has delayed the construction of its Pyeongtaek P4/P5 chip plants to 2026, prioritizing the Texas Taylor wafer plant instead.

Meanwhile, SMIC, Huahong Group, and Nexchip have all released their semi-annual reports, showing steady improvements in capacity utilization rates. SMIC expects its 12-inch monthly capacity to increase by around 60,000 wafers in late 2024 compared to the end of last year.

Huahong is accelerating the construction of its new 12-inch production line in Wuxi, which is expected to start production in the first quarter of next year.

According to a survey by TrendForce, strong demand for AI server has driven the total output value of the world’s top ten wafer foundries to increase by 9.6% quarter-on-quarter in the second quarter, reaching USD 32 billion.

TSMC, Samsung, SMIC, Huahong Group, and Nexchip ranked first, second, third, sixth, and tenth, respectively, among the world’s top ten wafer foundries.

• TSMC Plans to Build the Third Plant in Japan After 2030

J.W. Kuo, head of Taiwan’s economic department, recently stated in an interview that TSMC plans to build its third plant in Japan to produce advanced semiconductors, with the construction expected to commence after 2030.

TSMC’s first plant in Kumamoto, Japan, (Kumamoto P1) is expected to start mass production in 4Q24 (October-December), using 28/22nm and 16/12nm process technologies, with a monthly capacity of 55,000 wafers.

The second planned plant, also located in Kumamoto, is scheduled to commence construction at the end of 2024, with operations starting in late 2027, focusing on 6/7nm processes.

The combined monthly capacity of TSMC’s Kumamoto P1 and P2 is expected to exceed 100,000 wafers. TSMC Chairman C.C.Wei mentioned in June that after the first and second plants are operational, TSMC may consider building a third plant in Kumamoto if the local residents agree.

• Samsung Delays the Construction of Pyeongtaek P4/P5 Plants to 2026, Prioritizing Texas Taylor Plant

Per global media reports on September 2, Samsung has postponed the construction of the second and fourth phase production lines of the Pyeongtaek P4 and P5 plants to 2026. Samsung is currently focusing on building a wafer plant in Taylor, Texas.

It is reported that Samsung did not conduct the necessary financial review for the Pyeongtaek P5 plant by the end of July 2024, leading to delays in the construction plans for both P5 and P4 plants.

However, the first-phase production line of P4 plant, which produces NAND Flash, is expected to start production soon. The third-phase production line is currently under construction, with plans to install power equipment after the Mid-Autumn Festival.

The original plan for P4 plant was to first build a memory production line (Phase 1), then a wafer foundry line (Phase 2), followed by additional memory and wafer foundry lines (Phases 3 and 4) to complete P4 plant.

However, it is reported that the wafer foundry business at this production line failed to meet expectations, prompting Samsung to prioritize the construction of memory production lines.

The sources cited by DRAMExchange revealed that the product lineup for the P4 Phase 2 production line is expected to be finalized between January and February 2025.

The Taylor plant began construction in the first half of 2022 and is expected to put into operation in 2026. The project’s investment scale is approximately USD 17 billion, with wafer manufacturing originally planned for the 4nm node.

However, industry news from June 2024 indicates that Samsung has added 2nm advanced process technology to meet the demand driven by the AI wave.

In April 2024, Samsung signed an agreement with the U.S. Department of Commerce to receive USD 6.4 billion in subsidies under the CHIPS Act.

• SMIC’s Revenue Grows by 23.2% Year-on-Year

Recently, SMIC released its half-yearly financial results, showing that the company achieved a revenue of CNY 26.269 billion, a year-on-year increase of 23.2%.

The net profit attributable to the parent company was CNY 1.646 billion, a year-on-year decrease of 45.1%, and the net profit after deducting non-recurring gains and losses was CNY 1.288 billion, a year-on-year decrease of 27%.

In terms of capacity utilization, SMIC’s 8-inch utilization rate has rebounded. The company stated that its 12-inch capacity has been near full load in recent quarters, with additional effective capacity added in the first half of this year, and the new capacity has been rapidly put into production.

The company’s overall capacity utilization rate increased to 85%, up 4 percentage points from the previous quarter.

These financial results highlight two key indicators that send an important signal to the market. Although SMIC’s profits fell short of expectations, its revenue continued to rise, reflecting signs of recovery in downstream markets.

Beyond the recovery in revenue, the increase in capacity utilization is a major highlight of the report.

Data indicates that the main drivers of SMIC’s revenue turnaround were the smartphone and consumer electronics business, further demonstrating signs of recovery in the semiconductor market.

As to wafer revenue by size, demand for 8-inch wafers has rebounded, with the revenue share increasing to 26%, up 2 percentage points from the previous quarter, while the revenue share for 12-inch wafer is 74%.

Regarding capacity expansion, SMIC expects its 12-inch monthly capacity to increase by around 60,000 wafers by the end of this year compared to the end of last year. SMIC provided guidance for the third quarter, projecting a revenue growth of 13% to 15% quarter-on-quarter, with a gross margin between 18% and 20%.

• Huahong’s Capacity Utilization Rate Exceeded 100% in Q2

Huahong achieved operating income of around CNY 6.732 billion in the first half of the year, a year-on-year decrease of 23.88%. The net profit attributable to shareholders was CNY 265 million, a year-on-year decrease of 83.33%.

It expects third-quarter sales revenue of CNY 500 million to 520 million, with a gross margin between 10% and 12%.

In terms of capacity utilization, Huahong reported that the company’s 8-inch capacity utilization rate surpassed 100% in the second quarter, with the 12-inch capacity utilization rate closed to full capacity.

The overall capacity utilization rate was 97.9%, a significant improvement from 91.7% in the first quarter, but still below the 102.7% capacity utilization rate in the second quarter of last year, indicating that Huahong has not yet returned to its peak level.

On product mix, Huahong’s major revenue contributors are discrete device and embedded non-volatile memory. In the second quarter of this year, the combined revenue share of these two segments was 60.5%.

Regarding production, the company is accelerating the construction of its new 12-inch production line in Wuxi.

In August, Huahong announced that the first phase of Wuxi base currently has a capacity of 94,500 wafers per month, with nearly all process platforms steadily scaling up production.

The second phase of Wuxi, after about a year of construction, is now 80% of completion, with the first equipment installation scheduled for the end of August. The production line is expected to be completed by the end of the year, with capacity to be released starting in the first quarter of next year.

• Nexchip Turned Profitable Compared to the Same Period of Last Year

Nexchip achieved a revenue of CNY 4.398 billion, a year-on-year increase of 48.09%, and a net profit attributable to the parent company of CNY 187 million, turning losses into gains year on year. The company’s gross margin was 24.43%.

Nexchip mainly engages in 12-inch wafer foundry services, providing wafer foundry services for DDIC and other process platforms.

In 1H24, the revenue share from CIS has significantly increased, making it the company’s second-largest product segment, with CIS capacity running at full load.

The company’s current wafer foundry capacity is 115,000 wafers per month, and it plans to expand capacity by 30,000 to 50,000 wafers per month in 2024, focusing on 55nm and 40nm nodes, with a primary focus on advanced CIS.

From a quarter-on-quarter perspective, the semi-annual reports of the three major foundries, SMIC, Huahong, and Nexchip, indicate a gradual upturn in business performance and steady improvement in capacity utilization rate.

Industry sources cited by DRAMExchange suggested that this signals an accelerated speed of recovery in the semiconductor market, and the second half of the year may see more positive surprises.

Read more

• [News] TSMC to Build Third Fab in Japan? The Timing May Be Reportedly after 2030
• [News] Two Contrasting Trends Emerge in Wafer Foundry Industry

(Photo credit: TSMC)