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According to a report from Commercial Times, citing industry sources, TSMC has become the focus of active collaboration efforts from various parties. The governor of Texas, Greg Abbott, plans to visit TSMC after the U.S. elections to persuade the company to transfer its Arizona plant investment plan to Texas, offering discounts on water and electricity, along with subsidy incentives.
Texas is actively courting TSMC, offering more favorable policies in hopes of persuading the company to shift its original Arizona investment to the state. Furthermore, the report indicated that, citing industry sources, Texas offers a well-established supply chain cluster of Taiwanese factories, along with its proximity to Mexico.
The report also noted that Samsung Display has sought TSMC’s production support to meet Apple’s growing demand. According to the report, institutional investors highlighted that as the LCD market shifts to AMOLED, UMC’s display driver capacity is facing supply shortages, and TSMC is the only company capable of meeting Apple’s production capacity requirements. Additionally, next year’s capacity for mature process production is expected to be loose, and TSMC is anticipated to offer discounts to boost utilization rates.
Regarding the technological development from TSMC, the report also indicated that TSMC is advancing its 16nm FinFET process to produce driver ICs, enhancing their high performance and low power consumption, which is expected to appeal to Apple.
According to the report, industry sources indicate that FOPLP packaging technology is a key area of development for both Apple and TSMC, suggesting that FOPLP will be a major focus of advanced packaging innovation in the next phase. The report also speculates that the Texas governor’s visit to TSMC may have been arranged by Apple, a major client of TSMC.
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(Photo credit: TSMC)
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Though having abandoned its initial IPO plan in October due to lower market valuation, Kioxia asserts its optimism on NAND. According to a report by Reuters, the Japanese memory giant anticipates flash memory demand to grow approximately 2.7 times by 2028, fueled by the surge in artificial intelligence applications.
According to the report, Kioxia is preparing a significant capacity expansion at its new facility in Kitakami, Iwate Prefecture, in northern Japan, which was originally set to begin operation last year. Amid challenges due to a downturn in the memory chip market, the start date has reportedly been postponed to autumn 2025.
Kioxia announced in a press release that the building construction of Fab2 (K2) of its Kitakami Plant was completed in July. In addition, some administration and engineering departments will move into a new administration building located adjacent to K2 beginning in November 2024 to oversee the operation of K2.
Citing Tomoharu Watanabe, Kioxia’s executive vice president, the Reuters report notes that in addition to the sufficient capacity Kioxia has at Yokkaichi, Mei Perfecture, Kioxia’s Kitakami factory is set to begin operations next autumn, and the company expects to have ample space to meet demand.
According to a previous report by The Japan Times, Japan’s industry ministry will provide up to 242.9 billion yen (USD 1.64 billion) in subsidies to support Bain Capital-backed Kioxia and Western Digital in expanding memory chip production facilities in Mie and Iwate prefectures.
In July, the company began sample shipments of its newest generation of NAND flash memory, according to the report. In October, it also begun mass production of the industry’s first Universal Flash Storage Ver. 4.0 embedded flash memory devices with 4-bit-per-cell, quadruple-level cell (QLC) technology.
Kioxia achieved revenue of 428.5 billion yen (about USD 2.75 billion) in the first quarter of fiscal year 2024, ending June 30, reflecting a 33% increase from the prior quarter and setting a new record for quarterly revenue.
According to TrendForce, in the NAND Flash market, Kioxia ranked third in revenue in the second quarter of 2024, with a 13.8% market share, after Samsung (36.9%) and SK Group (22.1%).
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According to a report from Business Korea, South Korea’s semiconductor industry is under growing pressure from the intense R&D efforts of Taiwan, Japan, and the U.S., as South Korean engineers work fewer hours compared to their global counterparts, due to current labor regulations.
The report pointed out that in order to keep the competiveness of companies like Samsung Electronics and SK Hynix, reforms in labor market flexibility are necessary.
The report, citing data from the semiconductor industry and the Ministry of Employment and Labor in South Korea, noted that the average monthly working hours for employees in South Korean businesses with one or more full-time workers is 156.2 hours. This is fewer than the 180.3 hours worked by Taiwanese employees as of August 2024.
According to the data, the report emphasized that compared to Taiwanese workers, South Korean workers work three days less per month. The report highlighted that the shorter working hours of South Korean employees could weaken the country’s R&D competitiveness, as companies like Taiwan’s TSMC or the U.S.’s NVIDIA expect employees to work around the clock when necessary.
The report noted that engineers in South Korea face legal restrictions preventing them from working beyond a set time. These reduced working hours, imposed by labor regulations, could threaten the competitiveness of South Korean tech companies. The report also highlighted that, although South Korea currently holds a fragile lead in the memory semiconductor sector, this position is at risk of being overtaken.
According to the report, South Korea’s strict labor regulations, including a 52-hour workweek limit introduced in 2018, were intended to promote work-life balance. However, there is increasing concern that these regulations may impede economic growth and innovation, particularly in high-tech sectors such as semiconductors.
(Photo credit: Samsung)
News
Recently, Chinese semiconductor companies Natural Semicon and Zensemi have recently announced advancements in their 12-inch wafer production lines, while Chinese equipment manufacturers Naura, Hwatsing, and JSG have reported promising developments in 12-inch equipment technology.
Natural Semicon’s 12-inch Production Line in Zhuhai Achieves Milestone
On November 2, Zhuhai-based Natural Semicon successfully connected its 12-inch wafer-level TSV (Through-Silicon Via) integration production line. On the same day, Natural Semicon unveiled its “Ninefold” technology platform, the first Chinese-named wafer-level 3D integration technology system.
Upon completion of Phase I, the new production line will have an annual capacity of 240,000 TSV-integrated units to support applications in AI, high-performance computing, and more. The project is expected to begin full-scale production on December 30, 2024. Moving forward, Phase II is set to boost capacity to 600,000 units annually between 2028 and 2032 as part of a strategic growth phase.
Zensemi Completes 12-inch Wafer Project Connection
Recently, Zensemi’s COO reported in an interview with CNR that the Zensemi project took just 18 months from groundbreaking to line connection. To date, Zensemi has produced 1,000 wafers, which are now undergoing a 1,000-hour reliability test. The company plans to commence mass production soon.
At a June 28 launch event, Zensemi inaugurated its 12-inch wafer production line for intelligent sensor chips, which is the first of its kind in China and second worldwide. The chips produced will target sectors such as IoT, industrial control, and automotive electronics. Starting next year, the line is expected to supply 20,000 chips monthly from Guangzhou’s Zengcheng district.
China’s Top Equipment Manufacturers Announce 12-inch Equipment R&D Progress
Chinese equipment manufacturers Naura, Hwatsing, and JSG have shared updates on their 12-inch equipment developments.
Naura recently delivered its domestically developed 12-inch plasma-enhanced chemical vapor deposition (PECVD) system to a client. The Cygnus series PECVD system is designed to produce high-quality films for applications such as passivation, isolation, anti-reflective coatings, and etching stop layers in logic, memory, and advanced packaging. It can handle large, high-warp wafers and produce films like silicon oxide, silicon nitride, and other compounds.
On October 31, Hwatsing revealed in its investor relations report that its flagship CMP and thinning equipment saw broader applications and greater market acceptance in the first three quarters of 2024. Its new Universal H300 CMP system is now in limited production, receiving orders from key customers, while its 12-inch high-precision wafer thinning machine, Versatile-GP300, completed its initial customer validation and met batch production requirements.
On October 28, JSG disclosed that it has expanded R&D in semiconductor equipment for large silicon wafers, chips, and packaging, achieving breakthroughs in domestic production of 8- to 12-inch wafer equipment. These products have reached mass production and are well received by downstream customers, leading in market share within China’s domestically produced crystal growth equipment sector.
News
According to a report from TechNews, citing a report from Nikkei, TSMC is set to receive ASML’s most advanced High NA EUV lithography machines before the end of the year.
The machine, known as high numerical aperture extreme ultraviolet (High NA EUV) lithography equipment, costs over USD 350 million each and allows semiconductor manufacturers to produce wafers with smaller transistor line widths, according to Nikkei.
The report indicated that TSMC is likely to use the machines for its angstrom 10 (A10) technology, expected to enter mass production sometime after 2030. The A10 technology is about two generations ahead of the 2-nm chips that TSMC plans to mass produce by the end of 2025.
The report from TechNews noted that acquiring High NA EUV lithography equipment does not guarantee a smooth entry into the “angstrom” (A10) domain. Chip manufacturers must still make design adjustments after acquiring the equipment.
According to the report from Nikkei, TSMC is not the first to acquire ASML’s latest and most advanced equipment—Intel was the first to adopt it. Intel’s Oregon fab received the first set of High NA EUV machines in the first quarter of this year, followed by a second set in the second quarter.
According to another report from TechNews, the CEO of ASML has announced that Intel’s second High-NA EUV system has been completely assembled in October.
On the other hand, according to Sedaily, Samsung is expected to begin bringing in its first High-NA EUV equipment between the end of this year and the first quarter of next year. However, the company is said to reduce the number of next-generation High NA EUV lithography machines it plans to introduce, according to a report from South Korean media outlet BusinessKorea citing sources.
Intel, Samsung, and TSMC are currently the only clients of ASML’s High NA EUV machines. Meanwhile, due to U.S. sanctions preventing Chinese companies from accessing ASML’s EUV products and services, ASML has lost the Chinese market. However, the company stated that it has still received orders for 10 to 20 units, as the report from TechNews indicated.
According to the report from TechNews, as ASML monopolizes the advanced EUV lithography market—essential for manufacturing next-generation semiconductors—the U.S. has started investing in EUV research to revive its domestic semiconductor supply chain. However, this effort may take years, or even decades, to bear fruit.
According to a report from eeNews, recently, the U.S. government is funding a billion-dollar research center focused on next-generation EUV process technology, marking the first CHIPS for America R&D flagship facility. This initiative is designed to advance domestic capabilities in semiconductor technology.
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(Photo credit: TSMC)