According to TrendForce’s latest memory spot price trend report, the weak demand is putting more and more pressure on sellers, causing spot prices of modules and chips continue to record a sharper fall than the week before. Meanwhile, regarding NAND Flash prices, the spot market continued to drop this week, while suppliers are thus hoping that the traditional peak season (3Q24) would generate additional demand. Details are as follows:

DRAM Spot Price:

Trading activities have further slowed down in the spot market compared with last week. Since it is now near the end of May, the weak demand situation is putting more and more pressure on sellers, and spot prices of modules and chips continue to fall. The average spot price of mainstream chips (i.e., DDR4 1Gx8 2666MT/s) has dropped by 0.42% from US$1.917 last week to US$1.909 this week.

NAND Flash Spot Price:

The spot market is seeing activities of truncation due to suppliers’ pressure in funds yielded by their excessive inventory, and the chaotic negotiation of prices has been widened in scale, though inquiries on market prices and transactions are maintained on the lesser end under lethargic demand. Suppliers are thus hoping that the traditional peak season (3Q24) would generate additional demand, and prompt the market to get rid of further inventory. Spot prices, as a result, continued to drop this week. 512Gb TLC wafers have dropped by 2.79% in spot prices this week, arriving at US$3.479.

According to a report on May 29th from The Korea Economic Daily, it has speculated that AMD is likely to become a customer of Samsung Electronics’ 3nm GAA process. Reportedly, during AMD CEO Lisa Su’s appearance at the 2024 ITF World, which was hosted by the Belgian microelectronics research center imec, Lisa Su revealed that AMD plans to use the 3nm GAA process for mass-producing next-generation chips.

As per the same report, Lisa Su stated that 3nm GAA transistors can enhance efficiency and performance, with improvements in packaging and interconnect technology. This will make AMD products more cost-effective and power-efficient. The report further addresses that Samsung is currently the only chip manufacturer with commercialized 3nm GAA process technology.

Samsung announced in June, 2022, that it has started initial production of its 3 nm process node applying Gate-All-Around (GAA) transistor architecture. It claims that compared to 5nm process, the first-generation 3nm process can reduce power consumption by up to 45%, improve performance by 23% and reduce area by 16% compared to 5nm, while the second-generation 3nm process is to reduce power consumption by up to 50%, improve performance by 30% and reduce area by 35%.

An industry source cited by the report indicated that Su’s remarks could be interpreted as AMD planning to officially collaborate with Samsung on 3nm technology. Reports suggest that AMD is preparing to partner with Samsung, as TSMC’s 3nm production capacity has been fully booked by customers like Apple and Qualcomm.

The collaboration between the two companies could be traced back to April this year, as per a report from Korean media outlet viva100, Samsung was said to had signed a new USD 3 billion agreement with processor giant AMD to supply HBM3e 12-layer DRAM for use in the Instinct MI350 series AI chips. Reportedly, Samsung also agreed to purchase AMD GPUs in exchange for HBM products, although details regarding the specific products and quantities involved remain unclear.

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(Photo credit: AMD)

DRAM giant Nanya Technology held its shareholder meeting earlier today, during which Chairman Chia-Chau Wu reported on the company’s operations. According to a report from UDN, He mentioned that despite challenges such as unfavorable market conditions, geopolitical tensions, and the US-China trade conflict, Nanya Technology experienced a transition from profit to loss last year.

Nevertheless, the company continues to possess strong technological capabilities. This year, Nanya plans to introduce more products using the 10nm 1B process. Additionally, the 10nm 1C process is set to complete its first product design by the end of this year and begin trial production early next year. In 2026, Nanya will introduce new facilities, and by integrating miniaturization and Through-Silicon Via (TSV) processes, it will enter the high-capacity DRAM module market to meet the demand from the server market.

Wu emphasized that the 1B process products are Nanya Technology’s key expansion focus this year. In addition to promoting 8Gb/4Gb DDR4 to the personal computer and bare die application markets, the 16Gb DDR5 will initially target mainstream markets, including personal computers and servers.

Wu further highlighted that Nanya Technology continues to invest in research and development during the industry’s adjustment period to strengthen its future competitiveness.

Currently, in addition to developing three products under the second-generation 10nm (1B) process, Nanya Technology is also developing four other products: 16Gb DDR5 and miniaturized versions, 16Gb LPDDR4, 16Gb LPDDR5, and 4Gb DDR3, which will also gradually enter trial production.

He added that this year, Nanya Technology will simultaneously develop Through-Silicon Via (TSV) process technology. In the future, by combining the miniaturized DDR5 with the TSV process, Nanya aims to produce high-capacity DRAM modules to meet the demand of the server market.

Furthermore, the third-generation 10nm (1C) process technology is on track, with the design of the first 16Gb DDR5 product expected to be completed by the end of the year and trial production beginning early next year.

To support the transition to the 1B process and the construction of new facilities, Nanya Technology’s capital expenditure for this year is approximately TWD 26 billion (roughly USD 805.2 million), with less than half of the budget allocated to production equipment.

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(Photo credit: Nanya Technology)

Samsung’ Foundry Business Division is set to host a Foundry and SAFE Forum in Silicon Valley, U.S., on June 12-13. According to Business Korea, the tech giant would reveal its latest technology roadmap, reportedly moving up its 1nm mass production schedule from 2027 to 2026.

Samsung’s SF1.4 process, which is said to compete with TSMC’s 1.4nm, originally targets to start mass production in 2027. Now the company seems to make an update and move the schedule ahead.

As per Samsung’s previous roadmap, the 2-nanometer SF2 process is set to debut in 2025. Compared to the second-generation 3GAP process at 3 nanometers, it offers a 25% improvement in power efficiency at the same frequency and complexity, as well as a 12% performance boost at the same power consumption and complexity, while reducing chip area by 5%.

In a previous report, Business Korea noted that Samsung had already secured the first batch of orders for 2nm AI chips, which goes to Japanese AI startup Preferred Networks.

On the other hand, TSMC, the leading semiconductor foundry, has also reportedly secured its 2nm order, as its 2nm process in on track for mass production in 2025.

Industry sources indicated that Apple’s Chief Operating Officer, Jeff Williams, made a visit to TSMC in May to secure the latter’s advanced manufacturing capacity, potentially 2nm process, booked for Apple’s in-house AI-chips, according to a report by Economic Daily News.

TSMC plans to reach the A16 node (1.6nm) in 2027. According to a previous report by TechNews, citing foreign media, TSMC is expected to start mass production for 1.4nm around 2027-2028. Recent reports from Economic Daily News indicated that TSMC intends to establish a factory in the Science Park of Taibao City, Chiayi County in central Taiwan to produce 1nm chips.

▲The advanced technology roadmap of TSMC, as shown in the 2024 Technology Symposium (Source: TSMC)

(Photo credit: Samsung)

According to a report from Reuters, Malaysian Prime Minister Anwar Ibrahim announced the National Semiconductor Strategy on May 28th, which includes providing at least USD 5.3 billion in financial support and training 60,000 semiconductor engineers, aiming to make Malaysia a global chip hub.

Over the next 5 to 10 years, at least MYR 25 billion (roughly USD 5.33 billion) will be allocated to cultivate chip talent and strengthen local businesses, with funding from Malaysia’s sovereign wealth funds such as Khazanah Nasional.

As per the semiconductor strategy, Malaysia plans to train 60,000 talents covering all aspects of chip manufacturing, including IC design, packaging, and testing. Universities and enterprises will participate in the training, and the government will also support local engineers in engaging in chip design IP.

Prime Minister Anwar revealed that Malaysia intends to establish at least 10 local  companies in design and advanced packaging for chips. If Malaysia wants to attract investment from global chip giants, cultivating more local semiconductor talent is crucial, especially as the country aims to enhance its advanced chip manufacturing capabilities.

The Malaysian government aims to attract at least MYR 500 billion (roughly USD 106.5 billion) in funds through domestic direct investment (DDI) and foreign direct investment (FDI) into fields such as chip design, advanced packaging, and manufacturing equipment.

Amidst the U.S.-China rivalry and other geopolitical tensions, global companies are seeking to diversify their supply chains. Facing competition between the U.S. and China, Malaysia is reportedly keen to maintain a neutral position in the semiconductor supply chain landscape.

Malaysia began engaging in the semiconductor industry over 50 years ago. According to the Malaysian Investment Development Authority (MIDA), the country currently provides 13% of global testing and packaging.

In December 2021, U.S. chip giant Intel announced an investment of over USD 7 billion to build a chip packaging and testing plant in Malaysia, expected to start production this year. Last year, German semiconductor giant Infineon announced an investment of EUR 5 billion to establish the world’s largest 200mm silicon carbide power chip plant in Malaysia over the next five years.

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(Photo credit: ASE Group)