GlobalWafers has achieved a milestone by successfully advancing silicon carbide (SiC) crystal growth to 8-inch wafers, aligning with major international players in the industry. The company foresees the commencement of small-scale shipments of 8-inch SiC products in Q4 2024, with substantial growth expected in 2025, surpassing the proportion of 6-inch wafers by 2026.

Accourding to CTEE, Doris Hsu, Chairwoman of GlobalWafers, shared that the yield for 8-inch SiC crystal growth has been excellent, with ample room for further expansion, currently exceeding 50%.

The company emphasizes its readiness with 8-inch SiC crystal growth, cutting, grinding, and polishing capabilities, with sample deliveries set for the first half of next year.

Hsu highlighted customers’ eagerness for GlobalWafers to expedite the transition from 6-inch to 8-inch SiC production, aiming for an “8-inch dominant, 6-inch secondary” approach. The increasing demand for 8-inch SiC is primarily driven by automotive customers.

In terms of technology, SiC is moving from 6-inch to 8-inch wafers due to increased demand. TrendForce’s insights indicated, “Currently, the silicon carbide industry is mostly using 6-inch wafers, accounting for nearly 80% of the market share, while 8-inch wafers make up less than 1%. Expanding the wafer size to 8 inches is considered crucial for further reducing the cost of silicon carbide devices.”

From a cost perspective, 8-inch wafers indeed offer substantial advantages, but the challenge of yield has consistently plagued SiC. TrendForce’s earlier research suggests that, when it reaches maturity, an 8-inch wafer’s selling price is approximately 1.5 times that of a 6-inch wafer, and the number of die an 8-inch wafer can produce is about 1.8 times that of a 6-inch SiC wafer, significantly improving wafer utilization.

While GlobalWafers currently manufactures SiC substrates in Taiwan, the future SiC epitaxy will take place in the United States, with plans to expand with two additional substrate and two additional epitaxy facilities.

The production of SiC crystals involves high-temperature and closed-environment growth, which demands meticulous furnace design and crucible material selection, adding complexity to equipment and operations.

GlobalWafers has designed and developed specialized SiC crystal growth furnaces, enhancing material quality control and lowering crystal growth costs. SiC’s high hardness and brittleness make wafer processing challenging, but GlobalWafers employs higher process accuracy and more efficient wafer handling methods to achieve ultra-thin SiC wafer processing.

(Image: GlobalWafers)

According to a report by Bloomberg, Yoshihiro Seki, Secretary-General of the ruling Liberal Democratic Party and a member of the Japanese parliament, has announced that the government is planning to allocate an additional ¥900 billion for the construction of TSMC’s Fab 2 in Kumamoto, Japan. Furthermore, an extra ¥590 billion in subsidies will be provided to support the construction of a wafer fab by the Japanese semiconductor startup Rapidus.

Seki emphasized that subsidies usually cover about one-third of the total investment. With measures like training Japanese engineers and collaborative R&D with local companies, this subsidy could increase to potentially cover up to half of the investment. He also noted that the specific amount remains subject to change as the additional budget has not been finalized yet.

The Japanese government initiated the “Strategy for Semiconductors and the Digital Industry” in 2021 to address economic risks and prepare for the wave of digitalization. At that time, they already provided ¥476 billion in subsidies for TSMC’s Kumamoto 1st Fab. The current subsidy marks an expansion of these efforts.

The local government Kumamoto is eagerly anticipating TSMC’s presence. Ikuo Kabashima, the Governor of Kumamoto Prefecture, recently proposed “New Airport Concept Next Stage” that envisions using the airport as a hub for semiconductor imports and exports over the next decade. This plan aims to stimulate the clustering of semiconductor-related industries and contribute to regional development centered around Kumamoto.

Moreover, the Japanese government has pledged to provide ¥330 billion in funding to enable Rapidus to construct a 2nm wafer fab in Hokkaido. These substantial subsidies underscore the Japanese government’s commitment to these semiconductor projects.

In response to the Japanese government’s additional subsidies, Tetsuro Higashi, Chairman of Rapidus, stated in an interview with Jiji Press on the 24th that apart from the new factory being built in Chitose, Hokkaido, “We also plan to construct second and third factories, and they will also be situated in Chitose, Hokkaido.” Rapidus’s 2nm chip R&D/production facility, Chitose Fab IIM-1, located in the Chitose Meimeimei World industrial park in Chitose, Hokkaido, commenced construction in September. The trial production line is expected to start in April 2025, with mass production slated to begin in 2027.

The semiconductor foundry, United Microelectronics Corporation (UMC), held an online briefing on October 25th to unveil its 3Q 2023 operational report. UMC achieved consolidated revenue of NT$57.07 billion, marking a 1.4% growth compared to the previous quarter’s NT$56.3 billion in 3Q23. However, it’s essential to note that this quarter’s revenue decreased by 24.3% in comparison to 3Q 2022.

In 3Q, a 35.9% gross margin yielded a net profit of NT$15.97 billion and an EPS of NT$1.29. The first three quarters of 2023 saw revenue at NT$167.575 billion, marking a 20.5% decline from 2022. The gross margin for this period remained at 35.8%, resulting in a net profit of NT$47.795 billion and an EPS of NT$3.87.

UMC’s Co-president, Jason Wang, highlighted that the company’s performance in the 3Q was boosted by the growing demand in the computer and communication sectors. This was further enhanced by ongoing improvements in product offerings and favorable exchange rates. Notably, despite a 2.3% decrease in overall wafer shipments, the revenue and gross margin remained robust compared to the previous quarter.

Delving into the terminal product market, products like LCD controllers, Wi-Fi, encoders and decoders, and touch IC controllers stimulated demand in the computer application sector. Additionally, the demand for RF front-end ICs and network chips contributed to the shipment volume in the communication sector.

Looking ahead to the 4Q, Wang said that the computer and communication sectors are gradually recovering in terms of short-term demand. In contrast, the automotive market remains challenging, and customers are adopting a cautious approach in managing inventory levels.

UMC foresees that the expansion of capacity at Fab 12A P6 in Nanjing in 2024 will provide significant support, further boosting revenue contributions for 22/28-nanometer technologies.

UMC’s estimate for the 4Q indicates that wafer shipments are projected to decline by 5%, with the average selling price remaining stable. Capacity utilization is expected to decrease from 67% in the previous quarter to a range of 61-63%, which will consequently impact the gross margin. It is estimated to decrease from 35.9% in the 3Q to a range of 31-33%.

Regarding capital expenditure, Q3 saw approximately $570 million spent, a 30.49% decrease from the previous quarter and a 25.39% decrease from 3Q 2022. Cumulative capital expenditure for the first three quarters reached around $2.4 billion, showing a 52.69% increase compared to 2022. The total 2023 capital expenditure remains at $3 billion, with 90% allocated to 12-inch capacity and 10% to 8-inch capacity.

(Image: UMC)

As Jiwei reported, AMD, although trailing NVIDIA in AI, has recently clinched significant deals, earning the trust of two major clients, Oracle and IBM. Oracle plans to integrate AMD’s Instinct MI300X AI chips into their cloud services, complemented by HPC GPUs. Additionally, as per insights from Ming-Chi Kuo, TF International Securities analyst, IBM is set to leverage AMD’s Xilinx FPGA solutions to handle artificial intelligence workloads.

Oracle’s extensive cloud computing infrastructure faces challenges due to a shortage of NVIDIA GPUs. Nonetheless, Oracle maintains an optimistic outlook. They aim to expand the deployment of the H100 chip by 2024 while considering AMD’s Instinct MI300X as a viable alternative. Oracle has decided to postpone the application of their in-house chips, a project with a multi-year timeline. Instead, they are shifting their focus to AMD’s high-performance AI chip, the MI300X, well-regarded for its impressive capabilities.

Reports indicate that Oracle intends to introduce these processor chips into their infrastructure in early 2024.

Similarly, IBM is exploring chip options beyond NVIDIA. Their new AI inference platform relies on NeuReality’s NR1 chip, manufactured on TSMC’s 7nm process. AMD plays a pivotal role in NeuReality’s AI solution by providing the essential FPGA chips. Foxconn is gearing up for AI server production using this technology in the Q4 2023.

Guo also pointed out that, although Nvidia remains the dominant AI chip manufacturer in 2024, AMD strengthens partnerships with platform service providers/CSPs like Microsoft and Amazon while acquiring companies like Nod.ai. This positions AMD to potentially narrow the AI gap with Nvidia starting in 2025. This collaboration also affirms that AMD remains unaffected by the updated U.S. ban on shipping AI chips to China.

(Image: AMD)

In recent updates from Shanghai Industrial μTechnology Research Institute (SITRI), Dr. Xing Wei’s research team has achieved a groundbreaking milestone in 300mm SOI wafer manufacturing technology. They have successfully created China’s inaugural 300mm Radio Frequency Silicon-on-insulator (RF-SOI) wafer.

The team harnessed the resources of the China Key Laboratory for Integrated Circuit Materials’ 300mm SOI research platform, systematically resolving critical technical challenges required for 300mm RF-SOI wafers. This involved low-oxygen high-resistance crystal production, deposition of low-stress high-resistivity polycrystalline silicon films, and non-contact planarization.

This achievement not only marks the inception of China’s 300mm SOI manufacturing technology but is also anticipated to drive the entire RF-SOI chip design, manufacturing, and packaging industry chain within China. It will also ensure a stable supply of SOI wafers in the country.

SOI technology boasts a wide range of applications, encompassing RF-SOI for communication RF front-ends, high-power Power-SOI components, and Photonics-SOI technology for optical communications. SOI technology, which positions silicon wafers on insulating material, has emerged as a game-changing innovation with unique advantages, break limitations associated with traditional silicon materials and integrated circuits.

(Image: SITRI)