Insights
Over the past two weeks, the unexpected rate hike by Japan, coupled with weak U.S. manufacturing PMI and rising unemployment rates, sparked fears of an economic recession in the markets. Meanwhile the strengthening of the yen prompted a significant number of carry trade investors to sell assets to cover margin calls, leading to a sharp decline in global stock markets within a short period.
However, as the U.S. services PMI and jobless claims came in better than expected, along with dovish remarks from the Bank of Japan, global stock markets quickly rebounded. Given the market’s heightened sensitivity to macroeconomic changes, this week’s key economic data need to be closely watched. Below is a preview of the upcoming economic data this week, as well as potential market outlook regarding these key indicators.
(Photo Credit: Federal Reserve)
News
In early August, Taiwanese IC design giant MediaTek revealed its plan to unveil the Dimensity 9400 flagship series in October, designed to support most large language models on the market. Now more details regarding MediaTek’s ambition in AI have surfaced, as reports from Wccftech and Chinese media MyDrivers note that the company teams up with NVIDIA, targeting to launch their AI PC chip in the first half of 2025.
The reports indicate that the chip is currently in the design phase, with verification and sampling anticipated next quarter.
TrendForce projects that the Arm chip co-developed by MediaTek and NVIDIA, with adoption of Wi-Fi 7 and 5G, is slated to occupy a spot in the AI NB market since 2Q25, and initiate a new wave of technical innovation after 2025.
According to Wccftech, rumors about a custom chip from MediaTek for the AI PC market have been circulating for a while, and the excitement of the market skyrocketed when NVIDIA is reportedly joining the development.
The AI PC SoC is said to confront Qualcomm’s Snapdragon X Elite series. Wccftech suggests that the chip will be manufactured using TSMC’s 3nm node, based on ARM architecture.
With AI giant NVIDIA involved, the SoC is also likely to achieve breakthroughs in the integrated graphics arena, the report says. In addition, the report also notes that given MediaTek’s expertise in creating power-efficient mobile chips like the Dimensity 9400, the company may be well-equipped to develop a chip for the AI PC segment that delivers both strong performance and impressive efficiency.
MediaTek and NVIDIA are also collaborating on automotive chips, with plans to launch their first chip in early 2025. MediaTek CEO Rick Tsai mentioned earlier that though details are yet to be disclosed, significant advancements in the automotive sector are expected between 2027 and 2028.
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(Photo credit: MediaTek)
News
Facing increased market demand and the ongoing recovery of the memory industry, a report from Korean media outlet ETNews has reported that Samsung has confirmed its investment plan for the 6th-Generation DRAM production line at the Pyeongtaek P4 plant, with the goal of starting mass production in June 2025.
Reportedly, the 6th-generation DRAM, known as ‘1c ,’ is a next-generation DRAM utilizing 10nm-class technology. Despite it is said to be a product that has not yet been commercialized in the global semiconductor industry, both Samsung Electronics and SK hynix are already preparing for mass production.
Samsung’s Pyeongtaek P4 is a comprehensive semiconductor production center, divided into four phases.
Samsung Electronics reportedly planned to begin construction on the P4 facility in 2022 and commence operations this year. However, even after completing the P4 building and essential infrastructure like electricity and water, the company did not proceed with building a production line. Due the downturn in the semiconductor market, Samsung adopted a downsizing strategy by scaling back its existing facilities.
As the semiconductor market started to recover in the second half of last year, Samsung Electronics shifted towards expansion and investment by mid-year. The company began installing NAND flash equipment in the previously unused P4 facility and has now confirmed its investment in 1c DRAM production.
As per ETNews, Samsung plans to initiate 1c DRAM production by the end of this year. The company is said to be considering launching HBM4 using 1c DRAM in the second half of 2025.
Given that HBM consumes significantly more DRAM than traditional memory, it is speculated by the report that Samsung’s construction of the 1c DRAM production line at the Pyeongtaek P4 plant may also be in preparation for HBM4.
As per TrendForce’s latest report on the memory industry, it’s revealed that DRAM and NAND Flash revenues are expected to see significant increases of 75% and 77%, respectively, in 2024, driven by increased bit demand, an improved supply-demand structure, and the rise of high-value products like HBM.
Furthermore, TrendForce also reports that Samsung’s P4L facility will be the key site for expanding memory capacity starting in 2025, starting with NAND production. Equipment installation for DRAM is expected to begin in mid-2025, with mass production of 1c nanometer DRAM slated to commence in 2026.
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(Photo credit: Samsung)
News
AI server solution provider Supermicro, at its earnings call last week, revealed that the liquid cooling industry has been facing shortages for critical components, which further hinders its shipments. According to the latest report by the Economic Daily News, sources from the supply chain indicate that the critical component Supermicro referred to is the “quick coupling.”
The report notes that Taiwanese companies, including Global Tek, Fositek and Lotes, are accelerating their pace on sample verification.
Thanks to the soaring demand, the market is seeing a frenzy for quick couplings, with buyers willing to pay premium prices to secure capacity, the report suggests. The report notes that the price of quick couplings has surged from the original USD 40 to USD 60 per unit, with eager buyers claiming to pay for more as long as the components are available.
Citing industry experts, the report explains that the liquid-cooling system in AI servers consists of six key components: cooling distribution units (CDUs), cold plates, cabinets, fan walls, coolant distribution manifolds (CDMs), and quick couplings.
Among these, quick couplings are responsible for connecting the coolant flow between the cold plate and the CDU with great speed. In addition, as they are also prone to leakage, their quality would be especially crucial for liquid-cooling systems to operate smoothly.
The reason for the shortage, the report notes, is primarily due to the fact that a single AI server cabinet requires hundreds of male and female threads for quick couplings. As major cloud service providers (CSPs) are purchasing AI servers in large quantities, the demand for quick couplings has surged drastically, even to hundreds of times of the cabinets themselves.
It is worth noting that currently, the market for liquid-cooling quick couplings in AI servers is dominated by seven companies, including two Chinese firms. However, as the sanctions implemented in the U.S.-China tech war restrict the momentum of the Chinese companies, the market demand could not be satisfy. Also, the patents related to the components have created high barriers for other suppliers to enter the market.
Taiwanese companies, including Global Tek, Fositek and Lotes, therefore, are actively investing in the business and accelerating their sample submission, eyeing for the opportunities to receive order transfers.
Global Tek, for example, is working with partners at its Wuxi plant in China and its Taoyuan plant in Taiwan, with samples being tested. The company anticipates revenue contribution as early as the fourth quarter of this year or early next year.
Fositek, supported by its parent company Asia Vital Components, is currently focused on developing quick couplings and has already submitted samples for customer certification. Lotes, on the other hand, expects to see progress by the end of the third quarter.
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(Photo credit: Supermicro)
News
Amid the advancement of emerging applications such as Artificial Intelligence (AI), High-Performance Computing (HPC), data center, and autonomous vehicle, fan-out panel-level packaging (FOPLP) technology has successfully garnered industry attention due to its advantages in significantly improving computing power, reducing latency, and increasing bandwidth. As a result, more manufacturers are entering this field.
Recently, semiconductor equipment manufacturer ACM Research Shanghai introduced the Ultra ECP ap-p panel-level electroplating equipment for FOPLP.
Prior to this, ACM has launched the Ultra C vac-p negative pressure cleaning equipment designed for fan-out panel-level packaging applications, signaling that ACM has successfully entered the high-growth FOPLP market.
It is worth mentioning that since the second quarter of this year, chip manufacturers like AMD have actively approached TSMC and professional OSAT (Outsourced Semiconductor Assembly and Test) companies to promote chip packaging using FOPLP technology, further increasing industry focus on FOPLP.
In fact, advanced packaging has an increasing demand for low-latency, high-bandwidth, and cost-effective semiconductor chips, and FOPLP offers high bandwidth and high-density chip interconnects, making it a technology with higher potential.
FOPLP is a process performed on larger square substrates, allowing multiple chips, passive components, and interconnects to be integrated into a single package on a panel, offering greater flexibility, scalability, and cost effectiveness.
By redistributing chips on larger rectangular panels, FOPLP largely reduces the costs of packaging large GPU and high-density, high-bandwidth memory (HBM).
It is reported that the utilization rate of traditional silicon wafers is less than 85%, while that of panels exceeds 95%. The effective area of a 600×600 mm panel is 5.7 times that of a 300 mm traditional silicon wafer, with overall panel cost expected to decrease by 66%.
The increase in area utilization leads to higher capacity, greater flexibility in AI chip design, and significant cost reduction.
Currently, major players in the FOPLP advanced packaging field include Powertech Technology, ASE Group, SPIL, TSMC, Innolux, JSnepes, and Samsung Electro-Mechanics.
TrendForce points out that FOPLP technology presents advantages and disadvantages, facing both opportunities and challenges. Its main strengths are lower unit cost and larger package size, but as its technology and equipment systems are still developing, the commercialization process is highly uncertain.
It is estimated that the mass production timeline for FOPLP in consumer IC and AI GPU may fall between the second half of 2024 to 2026, and 2027-2028, respectively.
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(Photo credit: ACMR)