SK hynix, the current High Bandwidth Memory (HBM) market leader, announced on August 6^th that it has signed a non-binding preliminary memorandum of terms with the U.S. Department of Commerce to receive up to USD 450 million in proposed direct funding and access to proposed loans of USD 500 million as part of the CHIPS and Science Act. The funding, according to its press release, will be used to build a production base for semiconductor packaging in Indiana.

Earlier in April, the other two memory giants, Samsung and Micron, have secured funds under the CHIPS and Science Act as well, receiving USD 6.4 billion and USD 6.1 billion, respectively.

SK hynix also noted in its press release that it plans to seek from the U.S. Department of the Treasury a tax benefit equivalent of up to 25% of the qualified capital expenditures through the Investment Tax Credit program.

The South Korean memory chip maker also said that it will proceed with the construction of the Indiana production base as planned to provide AI memory products. Through this, it looks forward to contributing to build a more resilient supply chain of the global semiconductor industry.

The signing follows SK hynix’s announcement in April that it plans to invest USD 3.87 billion to build a production base for advanced packaging in Indiana in a move expected to create around 1,000 jobs. According to a previous report by The Wall Street Journal, the advanced packaging fab it is expected to commence operations by 2028.

As the major HBM supplier of AI giant NVIDIA, SK hynix has good reason to accelerate the pace of capacity expansion. The recent NVIDIA Blackwell B200, with each GPU utilizing 8 HBM3e chips, has also underscored SK hynix’s role in the critical components supply chain for the AI industry.

On the other hand, a week earlier, semiconductor equipment leader Applied Materials was said to be rejected for funding under the CHIPS act for a R&D center in Silicon Valley, which targets to develop next-generation chipmaking tools. It has tried to gain U.S. funding for a USD 4 billion facility in Sunnyvale, California, which was slated to be completed in 2026.

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• [News] SK Hynix Reportedly Plans to Invest USD 4 Billion in Advanced Packaging Fab in Indiana
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(Photo credit: SK hynix)

Per a report from Reuters, Intel is said to be receiving the second new High-NA EUV equipment from ASML, costing EUR 350 million (~USD 383 million).

According to Intel’s earnings call on August 1, CEO Pat Gelsinger stated that Intel began receiving the first large equipment in December, and the installation process would take several months, which is expected to bring about a new generation of more powerful computer chip.

Gelsinger noted during the call that the second High-NA equipment is about to enter the facility in Oregon. Due to the poor stock performance following Intel’s earnings report, this statement did not attract much attention.

Previously, a senior executive from ASML once mentioned in July that the company already begun shipping the second High NA equipment to an unnamed customer, but would only record revenue for the first set this year. However, there are still some uncertainties regarding when the customer will adopt this equipment.

ASML has already received orders for over ten High-NA equipment from customers including TSMC, Samsung, Intel, Micron, and SK Hynix. Intel plans to use this technology for mass production by 2027, and TSMC is also set to receive the equipment this year, the time to put into production has not been disclosed, though.

ASML executive Christophe Fouquet stated on July 17 that DRAM memory chip manufacturers, which could refer to Samsung, SK Hynix, or Micron, are expected to start using High-NA equipment by 2025 or 2026.

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• [News] ASML Slightly Beats Q2 Earnings Forecasts, with Full-Year Outlook Unchanged
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(Photo credit: ASML)

With the chip war between the two great powers heating up, the U.S. is reportedly mulling new measures to limit China’s access to AI memory. As the restrictions might be imposed as early as late August, rumor has it that Chinese tech giants like Huawei and Baidu, along with other startups, are stockpiling high bandwidth memory (HBM) semiconductors from Samsung Electronics, according to the latest report by Reuters.

Citing sources familiar with the matter, the report notes that these companies have increased their purchases of AI-capable semiconductors since early this year. One source states that in accordance with this trend, China contributed to around 30% of Samsung’s HBM revenue in 1H24.

Regarding the details of the potential restrictions, sources cited by Reuters said that the U.S. authority is anticipated to establish guidelines for restricting access to HBM chips. While the U.S. Department of Commerce declined to comment, it did state last week that the government is continually evaluating the evolving threat landscape and updating export controls.

The Big Three in the memory sector, Samsung, SK hynix and Micron, are all working on their 4^th generation (HBM3) and 5^th generation (HBM3e) products, while closely cooperating with AI giants such as NVIDIA and AMD in developing AI accelerators.

Reuters notes that the surging HBM demand from China recently has primarily focused on HBM2e, which is two generations behind HBM3e. However, as the capacities of other manufacturers are already fully booked by other American AI companies, China has turned to Samsung for its HBM demand.

Sources cited by Reuters also indicate that a wide range of businesses, from satellite manufacturers to tech firms like Tencent, have been purchasing these HBM chips. Meanwhile, Huawei has been using Samsung HBM2e to produce its advanced Ascend AI chip, according to one of the sources. It is also reported that Chinese memory giant ChangXin Memory Technologies (CXMT) has started mass production of HBM2.

Samsung and SK hynix declined to comment, neither did Micron, Baidu, Huawei and Tencent respond to requests for comment, Reuters notes.

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• [News] US Reportedly Weighs Stricter Limits on AI Memory Access for China
• [News] U.S. Reportedly Enhancing Chip Export Restrictions to China, while NVIDIA’s H20 Might Get Banned

(Photo credit: Samsung)

Despite recent issues with NVIDIA’s GB200 shipments, the market remains optimistic about long-term AI demand, and CoWoS capacity continues to be in short supply.

According to a report from MoneyDJ, TSMC will assign orders of the initial stage of chip stacking in CoWoS packaging, Chip on Wafer (CoW), for the first time, to semiconductor assembly and test service provider SPIL.

The process will reportedly to manufactured at SPIL’s Zhong Ke Facility in Taichung. The company is said to build new capacity, with tool-in expected in the second quarter of 2025 and production ramping up in the third quarter.

TSMC President C.C. Wei previously disclosed that this year’s CoWoS capacity will more than double, with the growth trajectory similar in 2025. The company will continue to collaborate with OSATs to advance their packaging capabilities, Wei said.

Tien Wu, COO of another major outsourced semiconductor assembly & test services (OSAT) company ASE, also mentioned at its recent earnings call that the company has been co-developing both oS and CoW processes with their foundry partners for many years.

In fact, CoWoS is already a well-established technology. TSMC has been outsourcing the WoS (Wafer-on-Substrate) process, targeting small-batch, high-performance chips, while retaining the high-margin, high-tech CoW process in-house.

Lower-margin oS processes are handed over to packaging and testing companies. During the initial phase of this expansion wave, TSMC did not release CoW orders, but due to the overwhelming demand, they now have to outsource part of the process.

Industry sources cited by MoneyDJ further reveal that even Chinese companies have been excluded from the list, there are still several OSATs capable of handling TSMC’s outsourced CoWoS processes, such as Amkor, ASE, and SPIL.

After evaluation, SPIL’s plant in Central Taiwan was selected. It is reported that SPIL already collaborates with NVIDIA and AMD in the advanced packaging field, possessing capabilities not only for CoWoS-S but also for the higher-end CoWoS-L. This makes SPIL a strong second supplier for these major American companies.

Reportedly, TSMC will release the first phase of CoWoS-S orders to SPIL. Currently, SPIL’s CoWoS-related capacity is about 40,000 to 50,000 wafers per year. They plan to tool-in at the plant in Central Taiwan Science Park around the second quarter of next year.

It’s estimated by MoneyDJ’s report that TSMC’s CoWoS capacity remains in short supply, at 35,000 to 40,000 wafers per month this year. With the additional outsourced capacity, next year’s production could reach over 65,000 wafers per month, or possibly higher.

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• [News] TSMC Rumored to Build New CoWoS Plant in Southern Taiwan
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(Photo credit: TSMC)

According to a report from Nikkei on August 5, RS Technologies, a global giant in recycled wafers, has announced that due to increased orders, it will expand the monthly production capacity of its Japanese and Taiwanese plants to 580,000 wafers by 2024.

Despite the Japanese plant operating at full capacity, the company is still unable to meet the surging demand, prompting it to implement new investment plans to further increase production.

RS Technologies President Fang Yong Yi explained that there are various processes in semiconductor manufacturing, and many of them require repeated quality checks and testing, which utilize reclaimed wafers.

These reclaimed wafers are cleaned and subjected to precise regeneration processes, with each wafer being recyclable about 10 times. The company estimates that global monthly production output of reclaimed wafers will increase by 32% from 1.32 million in 2023 to 1.74 million in 2024.

Regarding TSMC’s new plant in Kumamoto Prefecture, which hints at a resurgence in semiconductor production within Japan, Fang noted that in 2023, orders for reclaimed wafers from major Japanese semiconductor companies like Kioxia significantly declined. However, in 2024, orders are expected to increase by 10,000 to 20,000 wafers month by month.

For 2024, the combined monthly production of RS Technologies’ Japanese and Taiwanese plants is projected to rise from 540,000 in 2023 to 580,000.

Reportedly, the Japanese plant is currently operating at full capacity with a 24-hour, three-shift system but still cannot meet demand. The plant’s current monthly production is 320,000 wafers, and new equipment investments are planned to add 170,000 wafers to the monthly capacity soon.

Fang further noted that orders for recycled test wafers from overseas vendors have also increased. New plants require a large volume of test wafers, and thus the simultaneous construction of new plants by overseas manufacturers represents a significant opportunity for the company.

RS Technologies, in a financial report released on May 13, announced plans to expand its overall monthly production capacity of reclaimed wafers to over 890,000 units by the end of 2026 to meet strong demand.

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