On May 16, Japanese foundry startup Rapidus announced the signing of a Memorandum of Understanding (MoU) with American RISC-V architecture chip design company, Esperanto. The two sides will collaborate on the research and development of AI semiconductors for data centers, aiming to jointly develop low-power AI chips.

Currently, according to a report from DRAMeXchange, despite the gradual ease of GPU shortage, power supply has become another bottleneck in the course of the AI development.

Industry sources cited in the report have pointed out that CPU and GPU have played a critical role in fostering the prosperity of the AI market. However, the increasing power consumption of the latest chips is causing a recent crisis. For instance, it is expected that by 2027, the energy consumed by generative AI processing will account for nearly 80% of the total electricity consumption of data centers in the United States.

Data center is a major engine to drive the growth of electricity demand. With the advent of the AI era, represented by generative AI, the power required for high-performance computing chips continuously increases, which in turn raises the electricity consumption of data centers.

Esperanto has been committed to designing large-scale parallel, high-performance, and energy-efficient computing solutions. Previously, it launched the ET-SOC-1-based RISC-V architecture many-core AI/HPC acceleration chip, built on TSMC’s 7nm process.

Rapidus is a wafer foundry founded in August 2022 with joint investments from eight Japanese companies, including Toyota, Sony, NTT, NEC, SoftBank, Denso, NAND flash giant Kioxia, and Mitsubishi UFJ. Its first factory, “IIM-1,” based in Chitose, Hokkaido, already broke ground in September 2023 and is expected to start running trial production lines in April 2025 and install EUV lithography machines. Rapidus aims to mass-produce the most advanced logic chips below 2nm by 2027.

The initial focus of the cooperation between Rapidus and Esperanto is to enable future semiconductor designers to develop more energy-efficient solutions for AI inference and high-performance computing workloads in data centers and enterprise edge applications. This will help mitigate the unsustainable growth of energy consumption across global data centers.

In 2022, data center, AI, and cryptocurrency consumed about 460 TWh of electricity worldwide in total, comprising 2% of the overall global demand. The International Energy Agency (IEA) predicts that, influenced by factors such as generative AI, global data center power demand could rise to about 1,000 TWh in 2026, roughly equivalent to the entire electricity consumption in Japan.

IEA states that updated regulations and technological improvements, including energy efficiency, are of great significance to curb the surge in data center energy consumption.

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(Photo credit: Rapidus)

Kioxia, one of the world’s major NAND manufacturer, anticipates a strong market outlook, emphasizing a full recovery this season in key NAND applications such as PCs and smartphones.

According to a report from the Economic Daily News, coupled with an expected surge in demand for new laptops and smartphones driven by AI, NAND chip prices, which increased by 20% last season, are likely to continue rising this season, marking the fourth consecutive price hike. The industry’s future appears quite promising.

Benefiting from the recovering NAND market, Kioxia reported its first revenue growth in seven quarters and profitability for the first time in six quarters. During an investor conference, Kioxia noted that NAND chip prices in US dollar rose by approximately 20% last season, continuing an upward trend for three consecutive quarters, with the company’s quarterly shipment volume increasing by about 5% to 9%.

Kioxia emphasized that this season sees a recovery trend in key NAND end applications such as PCs and smartphones. Additionally, a new wave of laptop and smartphone upgrades driven by AI is expected, along with data centers requiring higher-capacity solid-state drives (SSDs) to support AI applications. All these factors positively impact the NAND industry.

Kioxia is reportedly optimistic that the proliferation of AI and the increase in memory capacity will continue to drive long-term growth in the NAND market. Due to disciplined production output by NAND chip manufacturers, the price increase trend is expected to continue this season, making the industry’s future prospects quite optimistic.

Taiwanese NAND manufacturer ADATA believes that although upstream NAND suppliers are gradually returning to profitability and steadily increasing capacity utilization rates, their approach to pricing and capacity planning remains rational. Coupled with a noticeable recovery in demand for enterprise and data center SSDs, ADATA is reportedly optimistic that NAND chip prices will continue to rise in a stable manner, per the same report from Economic Daily News.

As per a research from TrendForce on March 6, in 4Q23, Samsung still firmly held the top position in the NAND Flash market, with its market share increasing from 31.4% in the previous quarter to 36.6%; SK Group, with its market share increasing from 20.2% in the previous quarter to 21.6%, stood in the second place quarterly revenue.

Following them were Western Digital, whose market share decreased from 16.9% in the previous quarter to 14.5%, Kioxia, whose market share decreased from 14.5% in the previous quarter to 12.6%, and Micron, whose market share decreased from 12.5% in the previous quarter to 9.9%.

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(Photo credit: Kioxia)

To strengthen its semiconductor supply chain, the Chinese government is reportedly requiring domestic automakers, including BYD, to expand their procurement of locally-produced chips. The goal is to increase the proportion of domestically-sourced automotive chips to 25% by 2025.

According to a report from Nikkei on May 16th, the Chinese government has instructed major local automakers to increase the proportion of domestically-produced automotive chips they procure to 25% by 2025 from 10% currently. The Chinese authorities hope that by raising the procurement ratio of Chinese-made chips, they can accelerate the pace of independence for the country’s semiconductor supply chain.

As per the same report, the Chinese Ministry of Industry and Information Technology (MIIT), which is responsible for national automotive industry policy, has asked major Chinese automakers to increase the local procurement ratio of automotive chips to 20-25%. This request targets not only the major electric vehicle manufacturer BYD but also SAIC Motor, Dongfeng Motor, GAC Motor, and FAW Group.

However, this requirement is not mandatory; instead, it encourages automakers to expand their procurement of local chips through incentives. An industry source cited by the same report revealed that ultimately, the goal is for all automotive chips to be locally sourced.

The report further indicates that though the conflict between China and the U.S. in the semiconductor sector continues to intensify, manufacturing technologies used for automotive chips are usually not the most advanced, and therefore not subject to U.S. export controls.

This means that Chinese semiconductor manufacturers will be able to procure manufacturing equipment from overseas, bolstering their automotive chip businesses.

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(Photo credit: iStock)

TSMC reportedly plans to utilize 12nm and 5nm process nodes in manufacturing the latest HBM4 memory, according to a report by AnandTech. Citing TSMC’s executives, the world’s largest dedicated semiconductor foundry would employ two fabrication processes, N12FFC+ and N5, to integrate HBM4e memory with next-generation AI and HPC processors.

During TSMC’s presentation at its European Technology Symposium 2024, which took place on May 14th, the company revealed new details about the base dies it will produce for HBM4 using advanced logic processes.

According to a senior director of design and technology platform citing by the report, TSMC is currently working with HBM memory partners, including Micron, Samsung and SK Hynix, on advanced nodes targeting HBM4.

Earlier in mid-April, SK Hynix announced that it has signed a memorandum of understanding with TSMC for collaboration to produce next-generation HBM and enhance logic and HBM integration through advanced packaging technology. The company plans to proceed with the development of HBM4, slated to be mass produced from 2026, through this initiative.

N12FFC+, believed to be more cost-effective, is expected to achieve HBM performance, while the N5 base die could offer more logic with significantly lower power.

In the symposium, TSMC stated that its 12FFC+ process is well-suited for HBM4 performance, enabling memory vendors to construct 12-Hi (48 GB) and 16-Hi (64 GB) stacks, with per-stack bandwidth exceeding 2 TB/second. It is also optimizing CoWoS-L and CoWoS-R for HBM4, which utilize over eight layers to support HBM4’s routing of over 2,000 interconnects with proper signal integrity.

These packaging solutions is said to provide interposers that can accommodate up to 8 times the reticle size, providing ample space for as many as 12 HBM4 memory stacks.

In addition, base dies produced with the N5 process will incorporate increased logic density, lower power consumption, and enhanced performance. However, the most significant advantage may lie in the extremely small interconnect pitches achievable with such advanced process technology, ranging from 6 to 9 microns. This capability will enable N5 base dies to be paired with direct bonding, facilitating the 3D stacking of HBM4 directly on top of logic chips. Direct bonding has the potential to significantly enhance memory performance, a crucial enhancement for AI and HPC chips constantly demanding higher memory bandwidth, according to the report.

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(Photo credit: TSMC)

According to a report from the Korean media outlet TheElec, South Korea is planning to establish an AI semiconductor innovation center in Silicon Valley.

The Korean Semiconductor Industry Association (KSIA) announced on Wednesday that it would accept applications until May 30th for those interested in residing at the planned center. A committee will review the applicants in June, with the move-in process beginning in August for those who are selected.

This initiative is part of the Ministry of Trade, Industry and Energy’s project to promote system semiconductor technology for export. Launched in April, the project aims to establish research platforms in the US and China. The ministry is collaborating with industry associations like KSIA for this endeavor.

A KSIA spokesperson informed TheElec that the center will provide independent offices for three to four companies and feature a large, open space for additional companies. The center will reportedly offer support for companies’ prototype testing, verification, and other assistance.

The South Korea government has been aggressively working on strengthening the country’s position in the semiconductor industry, as a series of ambitious projects have been announced recently, the AI Chip innovation center in the U.S. being its latest endeavor.

Earlier in May, the South Korean government is said to be planning to introduce a comprehensive chip investment and research support plan, surpassing KRW 10 trillion (roughly USD 7.3 billion) in scale, to enhance its position in the critical semiconductor industry, as per a report from the Economic Daily News.

Meanwhile, the report from South Korean media outlet BusinessKorea stated that on May 2nd, the South Korean Ministry of Trade, Industry, and Energy announced the “Second Strategic Planning and Investment Council,” comprising of representatives from research institutes, universities, etc, approved 62 new R&D projects for 2025, including flagship projects and roadmaps in over 11 domains.

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(Photo credit: iStock)