As semiconductor companies led by TSMC accelerate their pace for capacity expansion, benefiting the local supply chain, industry electricity consumption has emerged as a tough challenge for Taiwan. According to the latest report by the Economic Daily News, Taiwan can only accommodate 20 more large plants, with the power supply possibly reaching its limit in two years.

As its price of industrial electricity is comparatively lower to international rates, the Taiwan market not only attracts semiconductor companies but also international giants to establish data centers, the report noted. In addition to cloud service providers like AWS, Google, and Microsoft, Apple has recently planned to set up a data center in Taiwan.

Citing engineering companies familiar with high-tech industries, the report indicated that more than 10 new data centers are expected to be constructed in Taiwan. With the recent wave of announcements by semiconductor companies to launch advanced nodes and packaging capacities in Taiwan, it is estimated that once the 2nm and 1.6nm factories are fully operational, approximately 10 more semiconductor plants will result in a power supply challenge.

That is to say, Taiwan could accommodate around 20 more tech plants to be built by 2026 in total, the report said.

Take TSMC as an example. According to earlier reports by Commercial Times, the foundry giant’s 3nm plant in Tainan plans to begin mass production in the third quarter, while EUV (Extreme Ultraviolet Lithography) machines will be introduced progressively at another 3nm plant, P8 in Hsinchu, next year. On the other hand, TSMC’s advanced 2-nanometer process capacity is set to begin mass production in 2025.

Commercial Times noted that the EUV machines, crucial for advanced processes, will see over 60 units delivered this year and next to TSMC.

However, EUV machines are considered “electricity-consuming monsters.” According to an earlier report by BITS&CHIPS, ASML’s EUV machine consumes about a megawatt to produce 160 wafers per hour. Since a chip must go through twenty passes in this scanner, this results in an additional energy consumption of about 0.2 kWh per square centimeter of the chip, totaling 1.6 kWh per square centimeter. An earlier report by Bloomberg estimated that because of the vast amount of power needed to run EUVs, TSMC is expected to use 12.5% of Taiwan’s entire electricity supply by 2025.

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(Photo credit: TSMC’s P8, DACIN Construction)

Apple is reportedly pushing the boundaries of AI with the upcoming iPhone 16 series, which is expected to have computational power that surpasses industry expectations. According to a report from Economic Daily News, it has suggested that Apple is developing the A18 chip for this year’s iPhone 16 models, with performance potentially exceeding that of Apple’s current most powerful AI chip, the M4. This advancement means the iPhone 16 series will be more capable of running AI models on-device, adapting to various AI tasks.

While these applications are primarily aimed at high-end smartphones, the sources cited by the same report have shown optimism that TSMC and Foxconn, as parts of Apple’s supply chain, are likely to benefit from this development.

The same report further cites the rumor that the A18 chip developed for the iPhone 16 series will feature a highly powerful neural engine, crucial for handling generative AI functions. To keep up with the AI trend, Apple introduced its proprietary AI application, “Apple Intelligence,” in collaboration with OpenAI at this year’s Worldwide Developers Conference (WWDC). This application is designed for high-end models like the iPhone 15 Pro and Pro Max, with hardware capabilities exceeding expectations.

The iPad Pro which unveiled in May is the first to feature the M4 chip. Compared to its predecessor, the M2, the M4 chip boasts up to a 50% increase in CPU speed. Built with TSMC’s second-generation 3-nanometer technology, the M4 chip includes Apple’s fastest neural engine to date, capable of supporting up to 38 trillion operations per second.

If the A18 chip is equipped with an even more powerful neural engine, its computational speed will surpass that of the M4 chip. This means the iPhone 16 series will be able to run AI models locally with greater efficiency. Reportedly, TSMC is the exclusive supplier for the iPhone 16’s processors, therefore expected to be benefited from the strond demand of A18.

On the other hand, Foxconn, historically the largest assembler of iPhones, has recently focused on high-end models. As Apple intensifies AI functionality in new devices, the market anticipates a new wave of device upgrades, enhancing Foxconn’s performance in consumer electronics in the latter half of the year.

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(Photo credit: Apple)

Semiconductor equipment giant ASML plans to launch Hyper-NA Extreme Ultraviolet (EUV) machines by 2030, signaling the advent of the Angstrom era for semiconductor processes below 1 nanometer. However, according to a report from The Chosun Daily, the high cost of this equipment may cause TSMC, Samsung, and Intel to hesitate.

Reportedly, it’s said that ASML introduced a higher numerical aperture (high-NA) EUV machine last year, which outperforms existing EUV technology. Now, ASML is rumored to release the Hyper-NA EUV for sub-1nm processes by 2030. This development brings up significant strategic considerations for TSMC, Samsung, and Intel due to the substantial expense involved in acquiring such advanced equipment.

According to the report, currently, each EUV machine costs approximately USD 181 million. The new generation high-NA EUV machines cost from USD 290 million to USD 362 million per unit, while the expected cost for Hyper-NA EUV could exceed USD 724 million, namely, about twice the price of the previous generation.

The same report further points out that TSMC plans to maximize the capabilities of its existing EUV equipment and utilize them through multi-patterning techniques. Simultaneously, the company is evaluating the scale at which additional equipment may be introduced.

A source cited in the report mentioned that though TSMC adopted EUV technology after Samsung, it has managed to mitigate the investment burden of adopting new equipment by upgrading existing tools and employing multi-patterning techniques effectively.

The same source also indicated that TSMC is particularly interested in multi-patterning techniques. By leveraging its extensive expertise and existing EUV infrastructure, TSMC has developed multi-patterning processes, aiming to delay the adoption of high-NA and Hyper-NA EUV as much as possible.

TSMC has openly expressed concerns about the high cost of the new generation high-NA EUV machines. TSMC’s Senior Vice President of Business Development and Co-Chief Operating Officer, Dr. Kevin Zhang, has indicated that the development of 1.6 nanometer processes may not necessarily require high-NA technology.

Zhang further mentioned that the decision to adopt the new ASML technology would depend on where it offers the most economic benefits and the technical balance they can achieve. He declined to disclose when TSMC might purchase High-NA EUV from ASML. 

As per the same report, Samsung is also considering the adoption of high-NA equipment but is adjusting its long-term roadmap with the emergence of Hyper-NA. According to another source cited by the report, it claimed that choosing high-NA now may not be the best option for long-term plans that involve processes below 1 nanometer.

The source continued that given the emergence of Hyper-NA, one approach might be to maximize the use of existing EUV and skip high-NA, transitioning directly to Hyper-NA. However, this is under the premise that Hyper-NA equipment has reached a certain level of reliability.

Intel was the first foundry to adopt high-NA EUV technology. Last year, its foundry business suffered a USD 7 billion loss, and in the first quarter of this year, it faced a record operational loss. One of the reasons for these financial challenges may be contributed to the cost burden of being an early adopter of the next-generation EUV equipment.

ASML has stated that high-NA EUV will enable Intel to produce chips with process nodes from 2 nanometers down to 14 angstroms (1.4 nanometers) and from 10 angstroms (1 nanometer) down to 7 angstroms (0.7 nanometers). ASML also mentioned that Hyper-NA will be essential for future angstrom-scale processes, as it can reduce the risks associated with multi-patterning processes, the report noted.

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• [News] How Costly is the High-NA EUV? TSMC Reportedly Shocked, Considering Not Using the Equipment in its A16 Node
• [News] EUV as a Strategic Asset in the Most Advanced Processes: Progress in Intel/TSMC/Samsung’s Adoptions

(Photo credit: ASML)

On June 30, South Korea’s SK Group announced that its chip manufacturer, SK Hynix, will invest KRW 103 trillion (approximately USD 75 billion) by 2028 to enhance its chip business, with a particular focus on AI development.

According to a report from Commercial Times, SK Group recently concluded a two-day strategy meeting, after which it announced a full-scale effort to develop the AI capability, putting more emphasis on areas such as high-bandwidth memory (HBM), AI data centers, and AI voice assistants. SK Group further stated that 80% of the KRW 103 trillion, roughly KRW 82 trillion (USD 60 billion), will be dedicated to developing HBM.

HBM is widely used in generative AI chipsets, and SK Hynix is currently the exclusive supplier of HBM3 chips to NVIDIA. In the first quarter of this year, SK Hynix’s revenue more than doubled year-on-year to KRW 12.4 trillion, exceeding market expectations. Additionally, the company turned profit with an operating income of KRW 2.89 trillion, compared to a loss in the same period last year, primarily due to the high-margin HBM chips.

SK Group stated that by 2026, the group will invest KRW 80 trillion in AI and semiconductors, while continuing to streamline its businesses to increase profitability and return value to shareholders. Its plan to invest in AI chip development aligns with the South Korean government’s semiconductor policy.

As per a previous report from WeChat account DRAMeXchange, in January 2024, Korea launched the “World’s Largest and Best Semiconductor Supercluster Construction Plan,” proposing an investment of KRW 622 trillion (~USD 454 billion) by 2047, which is to build 16 new plants, inclusive of R&D facilities, and construct “Semiconductor Supercluster” in semiconductor-intensive cities such as Pyeongtaek, Hwaseong, Yongin, Icheon, and Suwon in southern Gyeonggi Province. It’s estimated that the chip production capacity will reach 7.7 million wafers per month by 2030.

According to another report from the Chosun Daily, starting from July, the South Korean government will also begin offering incentives and subsidies to semiconductor companies, launching a 26 trillion won (USD 19 billion) funding program to support the industry.

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• [News] South Korea to Boost Semiconductor with a 26 Trillion Won Subsidy Program Starting in July
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(Photo credit: SK Hynix)

TSMC’s capital expenditure is set to surge again in 2025 due to strong demand. According to a report from Economic Daily News citing sources, due to continued investment in the most advanced 2nm process and strong demand for 2nm technology, production capacity will be allocated to the Southern Taiwan Science Park. TSMC’s capital expenditure in 2025 is expected to reach between USD 32 billion to USD 36 billion, marking the second-highest in its history, with a year-over-year increase of 12.5% to 14.3%.

Reportedly, the market notes that ASML and Applied Materials will be the main beneficiaries of the increased capital expenditure by the leading manufacturer, and related suppliers are likely to benefit as well. TSMC has declined to comment on market rumors and reiterated that information regarding capital expenditure, and the progress of the 2nm process should be based on the content of the April earnings call next year.

TSMC emphasized at its April earnings call that its capital expenditure and capacity planning are based on long-term structural market demand. Capital expenditure for 2024 is expected to range between USD 28 billion and USD 32 billion. The 2nm process is scheduled to enter mass production as planned in 2025, with the production curve expected to be similar to that of 3nm.

In response to media questions at this year’s shareholder meeting, TSMC Chairman C.C. Wei stated that the previously announced USD 100 billion investment plan over three years was successfully achieved last year. He highlighted that AI presents a bright future for TSMC. He mentioned that capital expenditure and capacity planning are being carefully considered in line with market demand, and whether spending will exceed previous plans remains to be seen.

The sources cited by the same report have further reported that the demand from TSMC’s 2nm customer base has been unexpectedly strong. The related capacity expansion plans are also said to be directed towards the Southern Taiwan Science Park, facilitating process upgrades and creating space for new production.

In the 2nm client landscape, Apple remains a frontrunner, earmarking the technology for flagship smartphones. Intel has also expressed interest, with AMD, NVIDIA, and MediaTek expected to follow suit.

TSMC continues to push forward with its goal of 2nm mass production by 2025. The first fab in Baoshan for 2nm will have equipment installed by April 2024, and the second Baoshan fab will also maintain its schedule. The Kaohsiung fab is planned for 2nm expansion, with the earliest equipment installation expected by the third quarter of 2025. If the STSP also joins in production, mass production could continue to expand from late 2025 into 2026.

Read more

• [News] TSMC Achieved a New Step in the Construction of its Third 2nm Fab
• [News] Apple Not Adopting TSMC 2nm for iPhone 17? A19 Pro Chip Rumored to Use N3P Process

(Photo credit: TSMC)