Sources have revealed that major Chinese chip manufacturers such as SMIC (Semiconductor Manufacturing International Corporation) and CXMT (ChangXin Memory Technologies) are striving to localize the supply of critical chip materials and chemicals. This move is expected to counteract U.S. export controls and could potentially exclude global suppliers from the Chinese market.

According to a report from Nikkei News, since last year, SMIC has accelerated its efforts to require customers to help monitor, verify, and adopt local suppliers. This adoption covers a range of materials used in the chip manufacturing process, including wafers, chemicals, gasses, and other essential materials. Since being added to the U.S. entity list at the end of 2020, SMIC has been continuously exploring local supply alternatives.

Reportedly, CXMT is also actively launching a similar initiative to investigate local suppliers to replace foreign sources.

These actions indicate that China’s latest localization efforts extend beyond merely increasing the use of local chip manufacturing equipment. They now encompass hundreds of chemicals, materials, and gasses, which could potentially push foreign suppliers out of the local market.

Another source cited in a report from Nikkei news mentioned that chip manufacturers are maintaining ties with global suppliers of chip chemicals to avoid sudden impacts on production quality. However, strong incentives are stimulating the development of Chinese material suppliers. For example, National Silicon Industry Group is growing into a competitor against industry leaders like Shin-Etsu Chemical, Sumco, and GlobalWafers.

Chinese chip manufacturers are also expanding their use of local sputter targets, polishing pads, slurry, and ultra-high purity chemicals and gasses. These critical chip manufacturing materials markets have traditionally been dominated by foreign suppliers such as 3M, DuPont, and Sumitomo Chemical.

Sources cited in Nikkei’s report further indicate that these actions initially apply to less advanced chip manufacturing processes, such as 55nm and 40nm, but will eventually extend to processes below 28nm.

However, as per another report from Economic Daily News, some Taiwanese companies have indicated that the impact is limited. The areas that Chinese manufacturers can capture are mostly lower-end products, while mid-to-high-end products still heavily rely on foreign suppliers for the time being.

Taiwanese companies cited by Economic Daily News point out that China has been promoting the localization of its semiconductor supply chain for many years. While policy does provide some momentum, the key issues remain quality and yield rates. Customers are said to be reluctant to frequently adopt new suppliers, making it difficult to achieve comprehensive replacement.

Industry sources cited in the same report further note that China’s localization efforts in semiconductors are primarily focused on mature processes, with more noticeable progress in the mid-to-low-end sectors. For advanced materials like photoresists and polishing slurry, products from Japan and Western countries still hold a competitive advantage in terms of yield.

Additionally, industry sources mention that China is advancing its localization efforts more rapidly in the area of small-sized silicon wafers, which are mainly used for testing rather than production. However, for 8-inch and 12-inch silicon wafers, the market is still predominantly controlled by major foreign manufacturers.

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(Photo credit: SMIC)

According to TrendForce’s latest memory spot price trend report, sellers, in particular Samsung, have increased the chip supply, therefore pushing DRAM prices downward, while DDR4 products suffer from higher inventory. Regarding NAND Flash prices, the retail market is less willing in replenish orders, together with how wafer prices have been surging from the bottom, the depletion of spot prices could carry on. Details are as follows:

DRAM Spot Price:

The spot market has yet to show a demand turnaround; and sellers, in particular Samsung, have increased the chip supply, thereby pushing prices back down again. Looking at different types of DRAM products, module houses and channels have relatively high inventory levels for DDR4 products. Hence, the downward pressure on spot prices of DDR4 products is greater compared with spot prices of DDR5 products. Overall, even though contract prices have again registered significant increases in 2Q24, this rally has no positive effect on spot prices. Instead, spot transactions continue to show declining quantity, and the downward price pressure has become more pronounced. The average spot price of mainstream chips (i.e., DDR4 1Gx8 2666MT/s) has dropped by 1.19% from US$1.940 last week to US$1.917 this week.

NAND Flash Spot Price:

The Chinese government’s cracking down on smuggling of memory products, as well as the persistently sluggish demand from the retail market, have prompted module houses to amplify their sales intensity to actively pursue transactions, which led to a loosening in prices. Without replenishment of orders within the retail market, together with how wafer prices have surged from rock bottom to nearly 80% by now, the depletion of spot prices could carry on in the near future. Spot price for 512Gb TLC wafers has dropped by 2.61% this week, arriving at US$3.579.

Micron Technology Inc., the American memory giant, has slightly increased its capital expenditure for this year (2024) and has not updated its financial forecasts for the second quarter (March to May).

According to reports from Reuters, Investing.com, and other global news outlets, Matt Murphy, the CFO of Micron, stated on May 21st that the company’s capital expenditure forecast for 2024 is expected to reach approximately USD 8 billion, up from the previous estimate of USD 7.5 billion. This increase is primarily attributed to investments in High Bandwidth Memory (HBM).

Micron’s Chief Operating Officer, Manish Bhatia, stated that the scale of the HBM business is expected to expand to several billion dollars in the 2025 fiscal year.

As per a previous report by Economic Daily News, Micron’s current 8-layer stacking model offers the advantage of higher heat dissipation efficiency, as fewer layers allow for better cooling, ensuring stable chip performance. Additionally, Micron is planning to launch a 12-layer stacked 36Gb DRAM chip. Per a report from Tom’s Hardware, this new chip’s capacity is expected to be 50% greater than that of the previous 8-layer stack.

In March, Micron CEO Sanjay Mehrotra indicated that the company’s HBM earmarked for AI applications are sold out for 2024, with much of the 2025 supply already allocated.

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(Photo credit: Micron)

Fab inventories have declined for two consecutive quarters, indicating that reducing excess stock may currently be the semiconductor industry’s top priority. According to industry sources cited in a report from Commercial Times, fabs are predicted to wait until the second half of 2024 to resume ordering silicon wafers.

According to the latest quarterly analysis report from SEMI, a major microelectronics association, global silicon wafer shipments in the first quarter of 2024 reached 2,834 million square inches (MSI), marking a 5.4% decrease from the previous quarter and a 13.2% decrease from the same period last year.

SEMI attributes this decline in silicon wafer shipments to the continuing decline in IC fab utilization and inventory adjustments. Consequently, shipments of silicon wafers of all sizes experienced negative growth in the first quarter of 2024.

Industry sources cited by the same report note that, based on recent trends in foundry orders, apart from TSMC, other semiconductor manufacturers have seen capacity utilization rates around 70%. Among these, DRAM and Flash memory wafer shipments have shown year-on-year increases of 20.3% and 1%, respectively, indicating better performance compared to previous periods.

Japanese silicon wafer manufacturer Sumco recently announced in its financial report that in the first quarter, overall demand for 12-inch silicon wafers had bottomed out. Demand for logic chips used in AI and DRAM had increased. However, for applications outside of AI, customers continued to adjust their production.

Sumco estimates that due to customer production adjustments and the recovery of silicon wafer demand, it may take until the second half of 2024 for the situation to improve.

Industry sources cited by Economic Daily News believe that most IC design companies have returned to normal days of inventory (DOI) and are prioritizing urgent orders for foundries. However, the inventory levels of fabs and memory fabs remain historically high, so they will primarily focus on digesting existing long-term contracts (LTA) in the short term.

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(Photo credit: TSMC)

As the demands for AI and HPC processors keep their momentum, driving the usage of advanced packaging technologies, TSMC revealed plans to further expand its chip-on-wafer-on-substrate (CoWoS) capacity at a compound annual rate (CAGR) of over 60% until at least 2026, according to a report by AnandTech.

According to its latest roadmap revealed at the company’s European Technology Symposium earlier, TSMC would now be able to more than quadruple its CoWoS capacity from 2023 levels by the end of 2026, the report indicated.

Last year, the foundry leader announced plans to more than double its CoWoS capacity by the end of 2024, but now it needs to be more ambitious, not only to meet existing demand but also address the future market.

TSMC is also preparing additional versions of CoWoS (specifically CoWoS-L) to support building system-in-packages (SiPs) with up to eight reticle sizes, just in case that increasing CoWoS capacity four-fold over three years may still be insufficient, the report said.

In addition to CoWoS, TSMC also plans to expand its system-on-integrated chips (SoIC) capacity at a CAGR of 100% through 2026, indicating that its SoIC capacity will increase eight-fold from 2023 levels by the end of 2026, according to AnandTech.

When it comes to the latest overseas expansion plans regarding major Taiwanese foundries, TSMC’s Kumamoto Fab 1, a joint investment between TSMC, Sony Semiconductor Solutions Corporation, and Denso Corporation, was inaugurated in February. Construction of the second Kumamoto fab is slated to begin by the end of 2024, with operations starting by the end of 2027.

UMC, Taiwan’s second-largest wafer foundry, announced on May 21st the arrival of the first equipment tools for phase 3 expansion at its Fab12i located in Singapore. According to a report by CNA, UMC anticipates the construction of the facility will be completed by mid-year. However, due to adjustments in customer orders, mass production has been delayed by six months to early 2026.

In October, 2023, Powerchip Semiconductor Manufacturing Corporation (PSMC), in collaboration with SBI Holdings, Inc., announced plans regarding its first semiconductor wafer plant in Japan, which is expected to be located in the Second Northern Sendai Central Industrial Park in Ohira Village, Kurokawa District, Miyagi Prefecture (Second Northern Sendai Central Industrial Park).

Previous reports indicated that PSMC plans to construct multiple plants, with the first phase potentially starting construction as early as 2024, involving an investment of around JPY 400 billion (USD 2.6 billion).

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(Photo credit: TSMC)