Another breakthrough has emerged in flash memory layer technology! A recent report cited by tom’s Hardware has suggested that at the upcoming International Solid-State Circuits Conference (ISSCC) in February of this year, Samsung Electronics will unveil the next-generation V9 QLC NAND solution, pushing flash memory layer technology to 280 layers.

The Battle of Layers is Far from Over

Reportedly, Samsung’s V9 QLC boasts a storage density of 28.5Gb per square millimeter, achieving a maximum transfer rate of 3.2 Gbps. This surpasses the current leading QLC products (2.4 Gbps) and is poised to meet the requirements of future PCIe 6.0 solutions.

Additionally, the report further highlights that Samsung’s V9 QLC is considered the highest-density flash memory solution to date.

Before Samsung, major storage giants such as Micron and SK Hynix had already surpassed the 200-layer milestone. Micron reached 232 layers with a storage density of 19.5Gb per square millimeter, while SK Hynix achieved 238 layers with a storage density of 14.4Gb per square millimeter.

Still, 280 layers are not the end of the storage giants’ layer count competition; there will be breakthroughs with even higher layer counts in the future.

In August 2023, SK Hynix unveiled the world’s highest-layer 321-layer NAND flash memory samples, claimed to have become the industry’s first company developing NAND flash memory with over 300 layers, with plans for mass production by 2025.

Reportedly, SK Hynix’s 321-layer 1Tb TLC NAND achieves a 59% efficiency improvement compared to the previous generation 238-layer 512Gb. This is due to the ability to stack more units of data storage to higher levels, achieving greater storage capacity on the same chip, thereby increasing the output of chips per wafer unit.

On the other hand, Micron plans to introduce higher-layer products beyond the 232-layer milestone. Samsung, with ambitious plans, aims to stack V-NAND to over 1000 layers by 2030.

Kioxia and Western Digital, after showcasing their 218-layer technology in 2023 following the 162-layer milestone, also intend to develop 3D NAND products with over 300 layers in the future.

Amid Memory Market Rebound, What’s the Trend in NAND Flash Prices?

Amid economic headwinds and subdued demand in the consumer electronics market, the memory industry experienced a prolonged period of adjustment. It wasn’t until the fourth quarter of 2023 that the memory market began to rebound, leading to improved performances for related storage giants.

According to research conducted by TrendForce, a global market research firm, NAND Flash contract prices declined for four consecutive quarters starting from the third quarter of 2022, until they began to rise in the third quarter of 2023.

With a cautious outlook for market demand in 2024, the trend in NAND Flash prices will depend on the capacity utilization rates of suppliers.

TrendForce has projected a hike of 18-23% for NAND Flash contract prices, with a more moderated QoQ price increase of 3-8% for 2Q24. As the third quarter enters the traditional peak season, the quarterly price increase could potentially expand synchronously to 8-13%.

In 4Q24, the general price rally is anticipated to continue if suppliers maintain an effective strategy for controlling output. For NAND Flash products, their contract prices are forecasted to increase by 0-5% QoQ for 4Q24.

(Photo credit: Samsung)

Japanese telecommunications operator NTT is reportedly collaborating with American chipmaker Intel and other semiconductor manufacturers to research large-scale production of next-generation semiconductor technology, which involves significantly reducing power consumption using optical technology.

According to a report from Nikkei, SK Hynix is also set to participate in this initiative, expected to counter China through collaborative research and development strategies.

Meanwhile, the Japanese government will provide approximately JPY 45 billion in support. As cited by Nikkei quoting Japan’s Ministry of Economy, Trade, and Industry, Japan can lead the world in this technology as part of its strategy to revitalize the national semiconductor industry.

These companies are reportedly aiming to develop equipment manufacturing technology that integrates light with semiconductors and memory technology capable of storing data at Terabit-class speeds by the fiscal year 2027. Intel will provide technical development suggestions, aiming to reduce power consumption by 30-40% compared to conventional products.

As semiconductor scaling reaches physical limits, as per a report from TechNews, the industry is turning towards light. When combined with semiconductors, known as silicon photonics, it is expected to significantly reduce energy consumption. This technology is also seen as potentially game-changing for the semiconductor industry.

Signals received through optical communication is converted into electrical signals by specialized equipment, which are then transmitted to data center servers. Semiconductors within the servers then exchange electrical signals to process computations and memory. With the proliferation of AI and the need to process massive amounts of data, the demand for optical technology is anticipated to increase.

The integration of silicon photonics still presents numerous challenges, primarily concerning interface communication protocols. Consequently, synchronization in communication among semiconductor manufacturers is essential for the realization of silicon photonics technology.

Therefore, NTT aims to coordinate necessary technologies through collaboration with Intel and SK Hynix.

NTT holds a global leadership position in integrating optical and electronic technologies, having successfully pioneered the foundational technology of using light for transistor circuits. This achievement was published in the British scientific journal “Nature Photonics” in 2019, leading to the introduction of the IOWN (Innovative Optical and Wireless Network) fully optical network based on this technology.

(Photo credit: Intel)

With the highly anticipated opening of TSMC’s Kumamoto fab on February 24th, 2024, multiple Japanese or global semiconductor manufacturers are set to begin large-scale production in newly established plants in Japan.

According to sources cited by TechNews, this development will stimulate the growth and advancement of Japan’s domestic semiconductor supply chain, enhancing Japan’s semiconductor manufacturing capabilities, transitioning from Renesas Electronics’ 40-nanometer process to JASM’s 12-nanometer process.

TSMC Kumamoto Fab Set to Open on February 24

In Kikuyo Town, Kumamoto Prefecture, Japan Advanced Semiconductor Manufacturing (JASM) company, jointly invested by TSMC, SONY, and Japan’s DENSO, is currently constructing a 12-inch fab.

▲ TSMC’s Layout of Global Production Capacity Edited by TrendForce, January, 2024

The facility will employ 12/16-nanometer and 22/28-nanometer process, focusing on the production of chips for automotive electronic applications. The fab is scheduled to open on February 24, with mass production expected to commence in the fourth quarter of 2024.

This shift is regarded as the first step in Japan’s semiconductor revitalization policy. In support of this initiative, the Japanese government has provided a financial subsidy of JPY 476 billion (approximately USD 3.2 billion) to the JASM fab, covering nearly one-third of the total expenditure, which amounts to USD 8.6 billion.

Kioxia and Western Digital Jointly Constructing 12-Inch Plant

NAND Flash memory giants Kioxia and Western Digital are jointly investing in the construction of a 12-inch plant in Yokkaichi, Mie Prefecture. The facility is set to begin preparing for mass production of 3D NAND Flash memory products by March 2024.

Industry sources note that the plant’s construction will cost JPY 280 billion (approximately USD 1.8 billion ), with the Japanese government providing up to 92.9 billion yen (approximately USD 600 million) in subsidies.

Another Kioxia and Western Digital joint venture plant located in Kitakami, Iwate Prefecture, is slated to open in the second half of 2024. Originally scheduled for completion in 2023, the project faced delays due to unfavorable market conditions.

Renesas Electronics Expands Power Semiconductor Capacity

Renesas Electronics is set to launch a new power semiconductor production line in 2024. However, since the company’s Kofu factory in Yamanashi Prefecture closed in October 2014, Renesas is committing JPY 90 billion to install a 12-inch wafer production line at its existing facility to meet the growing demand for power semiconductors, especially in electric vehicles (EVs).

The new production line will enable Renesas Electronics to enhance its capacity for power semiconductors such as IGBT and MOSFET, with plans to achieve mass production by 2024. Renesas Electronics’ expansion plan is expected to receive subsidy support from the Japanese Ministry of Economy, Trade, and Industry.

Toshiba and ROHM Semiconductor Collaborate to Integrate Production Lines for Power Semiconductors

Toshiba and ROHM Semiconductor have reached an agreement to collaborate. Under the agreement, Toshiba’s power semiconductor factory will begin integrating production with ROHM’s newly developed Silicon Carbide (SiC) power semiconductor plant in Kunitomi City, Miyazaki Prefecture. This collaboration is expected to receive government subsidies equivalent to one-third of the investment in the project.

Japan’s New Fab Projects Beyond 2025

Beyond 2025, Japan is set to witness the emergence of several new plants, including Micron Technology’s new 1-gamma (1γ) DRAM production facility in Hiroshima Prefecture.

JSMC, a foundry subsidiary of Powerchip Semiconductor Manufacturing Corporation (PSMC), is collaborating with Japan’s financial group SBI to complete construction by 2027 and begin chip production thereafter.

Additionally, Japanese semiconductor startup Rapidus plans to commence production of 2-nanometer chips in Hokkaido by 2027.

Furthermore, TSMC is currently evaluating plans for its second plant in Japan, expected to be located in Kikuyo Town, Kumamoto Prefecture. Reports suggest that TSMC is set to officially announce the location of the second wafer plant on February 6th.

Earlier discussions by TSMC Chairman Mark Liu regarding the second plant in Japan indicated ongoing evaluations and discussions with the Japanese government. Once the decision to build the second plant is finalized, it is anticipated to manufacture products utilizing 7-nanometer to 16-nanometer process technologies.

Japan’s resurgence in the semiconductor arena is palpable, with the Ministry of Economy, Trade, and Industry fostering multi-faceted collaborations with the private sector. With a favorable exchange rate policy aiding factory construction and investments, the future looks bright for exports.

However, the looming shortage of semiconductor talent in Japan is a concern. In response, there are generous subsidy programs for talent development. Japan is strategically positioning itself to reclaim its former glory in the world of semiconductors.

Read more

• [News] TSMC Reportedly Announcing Kumamoto Plant 2 in Japan, while U.S. Subsidies Expected by End of March
• [News] ROHM Eyes R&D Expansion in Power Semiconductor Production Venture with Toshiba

(Photo credit: TSMC)

Since the release of the Huawei Mate 60 series smartphones, the Huawei Kirin chipset has been making a comeback with various iterations, including the Kirin 9000s and Kirin 9000E featured in the Mate 60 series. The latest update has revealed the confirmation of a new Kirin chipset named Kirin 9000W, making its debut in the Huawei MatePad Pro 13.2-inch.

According to the WeChat account ic211ic, the Huawei MatePad Pro 13.2-inch device was already available in the Chinese market last year, equipped with the Kirin 9000S chipset. However, the newly discovered Kirin 9000W is featured in the international version of the MatePad Pro 13.2” which has been launched in markets such as Malaysia, Italy, and Saudi Arabia.

The official website displays that the MatePad Pro 13.2-inch is equipped with the Kirin 9000W processor.

In other words, , the Huawei MatePad Pro 13.2-inch employs different processors in different countries, indicating that Huawei’s Kirin chipset family has added new members.

Currently, there are six different versions of the Kirin 9000 chipset available in the market, namely Kirin 9000, Kirin 9000E, Kirin 9000L, Kirin 9000S, Kirin 9000SL, and Kirin 9000W.

However, Huawei’s official websites in the mentioned markets only mention the “Kirin 9000W” without providing further details. Apart from mentioning the model, they only introduce it as an octa-core CPU. Based solely on this information, it’s challenging to determine the performance difference between Kirin 9000W and Kirin 9000S.

As per TechNews citing from sources, it has been suggested that the Kirin 9000W is likely similar to the Kirin 9000S but may offer slightly improved performance. Additionally, due to the larger size of the MatePad Pro, better temperature control might be necessary.

Read more

• [News] Kirin 9010 Shortage Rumors: Huawei P70 May Use Kirin 9000S in Some Models

(Photo credit: Huawei)

Amid the AI trend, the significance of high-value-added DRAM represented by HBM continues to grow.

HBM (High Bandwidth Memory) is a type of graphics DDR memory that boasts advantages such as high bandwidth, high capacity, low latency, and low power consumption compared to traditional DRAM chips. It accelerates AI data processing speed and is particularly suitable for high-performance computing scenarios like ChatGPT, making it highly valued by memory giants in recent years.

Memory is also representing one of Korea’s pillar industries, and to seize the AI opportunity and drive the development of the memory industry, Korea has recently designated HBM as a national strategic technology.

The country will provide tax incentives to companies like Samsung Electronics. Small and medium-sized enterprises in Korea can enjoy up to a 40% to 50% reduction, while large enterprises like Samsung Electronics can benefit from a reduction of up to 30% to 40%.

Overview of HBM Development Progress Among Top Manufacturers

The HBM market is currently dominated by three major storage giants: Samsung, SK Hynix, and Micron. Since the introduction of the first silicon interposer HBM product in 2014, HBM technology has smoothly transitioned from HBM, HBM2, and HBM2E to HBM3 and HBM3e through iterative innovation.

According to research by TrendForce, the mainstream HBM in the market in 2023 is HBM2e. This includes specifications used in NVIDIA A100/A800, AMD MI200, and most CSPs’ self-developed acceleration chips. To meet the evolving demands of AI accelerator chips, various manufacturers are planning to launch new products like HBM3e in 2024, expecting HBM3 and HBM3e to become the market norm.

The progress of HBM3e, as outlined in the timeline below, shows that Micron provided its 8hi (24GB) samples to NVIDIA by the end of July, SK hynix in mid-August, and Samsung in early October.

As for the higher-spec HBM4, TrendForce expects its potential launch in 2026. With the push for higher computational performance, HBM4 is set to expand from the current 12-layer (12hi) to 16-layer (16hi) stacks, spurring demand for new hybrid bonding techniques. HBM4 12hi products are set for a 2026 launch, with 16hi models following in 2027.

Meeting Demand, Manufacturers Actively Expand HBM Production

As companies like NVIDIA and AMD continue to introduce high-performance GPU products, the three major manufacturers are actively planning the mass production of HBM with corresponding specifications.

Previously, media reports highlighted Samsung’s efforts to expand HBM production capacity by acquiring certain buildings and equipment within the Samsung Display’s Cheonan facility.

Samsung plans to establish a new packaging line at the Cheonan plant dedicated to large-scale HBM production. The company has already invested KRW 10.5 trillion in the acquisition of the mentioned assets and equipment, with an additional investment of KRW 700 billion to KRW 1 trillion.

Micron Technology’s Taichung Fab 4 in Taiwan was officially inaugurated in early November 2023. Micron stated that Taichung Fab 4 would integrate advanced probing and packaging testing functions to mass-produce HBM3e and other products, thereby meeting the increasing demand for various applications such as artificial intelligence, data centers, edge computing, and the cloud. The company plans to start shipping HBM3e in early 2024.

In its latest financial report, SK Hynix stated that in the DRAM sector in 2023, its main products DDR5 DRAM and HBM3 experienced revenue growth of over fourfold and fivefold, respectively, compared to the previous year.

At the same time, in response to the growing demand for high-performance DRAM, SK Hynix will smoothly carry out the mass production of HBM3e for AI applications and the research and development of HBM4.

Read more

• Manufacturers Anticipate Completion of NVIDIA’s HBM3e Verification by 1Q24; HBM4 Expected to Launch in 2026, Says TrendForce
• [News] Strong Performance in HBM Ends SK Hynix’s Four Consecutive Quarters of Losses

(Photo credit: SK Hynix)