With 32 mature process wafer fabs set to be completed in China by the end of next year, Taiwanese wafer foundries are gearing up early in response to the “red alert.”

Faced with the pricing war, semiconductor insiders reveal that mature process foundries in Taiwan are anticipating a roughly 10% reduction in prices in the first quarter. The aim is to seize orders ahead of the competition and maintain high capacity utilization rates.

In contrast to traditional sales discounts, major semiconductor foundries like TSMC, UMC, and PSMC have recently introduced a “diversified” pricing strategy for IC design, including:

1. Volume Discounts: Significant price reductions are offered for orders exceeding ten thousand units, with pricing flexibility increasing as the order quantity grows.
2. Volume Tied Pricing: Maintaining a certain order volume, pricing has a degree of flexibility based on market conditions.
3. Deferred Wafer Delivery: Allowing the extension of the original wafer delivery timeline by one year or even longer, providing IC design firms with flexibility and reduced pressure when placing orders.
4. Dynamic Pricing: Rapid negotiations for urgent orders, reducing the risk of volume pressure for IC designers, albeit with relatively limited price flexibility.
5. Wafer Bank: Transforming wafers into semi-finished products stored in foundries, facilitating on-demand packaging and delivery when needed.

These initiatives are strategically positioned to capitalize on the anticipated recovery in consumer electronics demand next year.

Insiders reveal that due to the sluggish market conditions in the first quarter and the impact of an upcoming extended holiday, demand for the next quarter may not just be “cool” but could freeze.

Industry experts characterize this downturn as an “L-shaped bottom,” and if orders are taken by Chinese foundries before the recovery, Taiwanese foundries will lose out on the subsequent rebound. Consequently, the three major mature process wafer foundries in Taiwan are compelled to lower prices in advance, with an estimated price reduction of around 10% for the next quarter. However, the foundries refrain from commenting on pricing.

Historically, major domestic mature process fabs maintained stable prices but offered discounts by shipping more wafers than ordered. In an effort to boost high capacity utilization and secure orders early, these fabs will no longer stick to stable pricing in the first quarter of next year.

Instead, they have adopted a direct price reduction of 10% for orders exceeding 10,000 wafers. IC design companies estimate that as benchmark fabs initiate price reductions, other industry players will inevitably follow suit.

While the extent of price reduction varies depending on products and processes, an average price reduction of 10-20% for wafer foundry services in the first quarter of next year is anticipated.

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(Photo credit: TSMC)

Recent reports from the IC design industry suggest that TSMC, the leading semiconductor foundry, is contemplating a slight price concession for certain mature processes next year, marking a return after three years. Despite its reputation for firm pricing, TSMC’s willingness to make concessions is seen as a response to a decrease in capacity utilization. According to UDN News, this shift may indicate the broader trend of semiconductor foundries facing pricing pressures due to lower capacity utilization.

Known for its stable pricing with minimal fluctuations, TSMC typically offers single-digit percentage annual concessions to clients. The reported concession for specific mature processes is estimated to be around 2%. TSMC, however, declined to comment on these pricing adjustments.

Several IC design companies have confirmed ongoing negotiations with TSMC regarding price concessions for the upcoming year. One disclosed that TSMC’s concession method involves settling after the completion of a full quarter’s production, offsetting the next quarter’s mask costs. This approach allows for low single-digit percentage concessions in the following quarters.

Industry sources suggest that other semiconductor foundries have already taken significant measures, such as direct price reductions on large orders and providing additional free wafer allocations, aiming to boost capacity utilization. Chinese chipmakers initiated price reductions earlier and more aggressively than their Taiwanese counterparts, maintaining TSMC’s relatively firm pricing.

The news of TSMC considering concessions for certain mature processes, while not a direct price reduction, holds indicative significance. It is likely to exert pricing pressure on other industry players with mature processes before the peak season arrives in the latter half of next year.

During the semiconductor shortage in recent years, TSMC initially refrained from raising prices. As a result, its pricing remained relatively lower, even the lowest, compared to other industry players who significantly increased their prices. TSMC reportedly canceled concessions in 2021 and 2022 and initiated a rare price increase at the beginning of 2023, rumored to be in the range of 3% to 6%.

However, with the semiconductor market reversing, the supply chain has been gradually adjusting inventory since the second half of 2022. In the first half of this year, TSMC reportedly introduced an “increase quantity feedback plan,” offering additional mature process wafer allocations for orders reaching a certain quantity.

Although TSMC relies on advanced processes for over 50% of its revenue, with mature processes not being its primary focus, they remain a market consideration.

(Image: TSMC)

As TSMC speed up its global expansion, the developments in its overseas fabs and the appointments of key leaders are under intense scrutiny. According to reports from DeepTech’s Voice, TSMC is said to choose Ray Chuang as the General Manager/CEO for its Fab in Germany. Chuang is considered a rising star promoted from the 18A fab manager to Vice President of Fab Operations I in this year.

Ray Chuang, a TSMC veteran since 1997, originally served as the senior manager of the 18A fab, showcasing expertise in various process technologies. Notably, he successfully led teams in the mass production of N5 and N4 process. He was elevated to Vice President of the Fab Operations I in May, 2023.

The unveiling of fab managers for TSMC’s overseas sites is progressing. In addition to the already disclosed appointments of Rick Cassidy and Dr. Y.L. Wang as Chairman and CEO of the Arizona fab, respectively, the Japanese fab (JASM) will see Vice President Y.H. Liaw, responsible for mature process production, taking the helm as CEO, according to the press release from Taiwan OCAC.

Potential Impacts May Postpone TSMC’s Fab in Germany Progress

TSMC’s plan includes the establishment of a subsidiary, European Semiconductor Manufacturing Company (ESMC) GmbH, set to build a fab in Dresden, eastern Germany. The total investment stands at EUR 10 billion, with an expected subsidy of about EUR 5 billion from the German government. Noteworthy partners in this venture, including Infineon, NXP, and Bosch, will each hold a 10% stake, while TSMC retains substantial control with over 50% ownership. The fab’s primary focus will be on producing automotive chips using 28nm/22nm processes, with an estimated capacity of 30,000 to 50,000 wafers.

The fab in Germany was initially expected to receive an EUR 5 billion subsidy, with production scheduled for 2027. However, a report from Reuters on November 23rd highlighted a ruling by the Germany’s Constitutional court that the German government’s re-location of EUR 60 billion from the pandemic fund to the climate transition fund was unconstitutional. Consequently, the German Ministry of Finance issued an emergency notice, freezing spending plans across various federal budgets. This unexpected move may impact the subsidies initially earmarked for TSMC fab in Germany.

Insights from TrendForce indicate that ESMC’s total planned production capacity is approximately 40Kwspm. The fab is set to focus on 28/22nm and 16/12nm processes, with groundbreaking expected in the latter half of 2024 and full-scale production in 2027. Forecast from TrendForce suggest that TSMC’s overseas capacity share (includes China), will rise from 9% in 2023 to 15% by 2027.
(Image: TSMC)

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Power semiconductors, the key of energy conversion and circuit control in electronic devices, find themselves at the heart of electronic circuit functions such as power conversion, amplification, switching, and rectification. They play a pivotal role in various sectors like automotive, industrial, rail transportation, and electricity. As the new energy industry, led by solar energy and electric vehicles, advances, power semiconductors like IGBT and MOSFET emerge as key players in the realm of green energy.

The power semiconductor market, previously driven by the surge in the new energy sector, particularly in new energy vehicles, solar power, and energy storage, has experienced robust overall demand. China, being the global leader in both new energy vehicles and solar energy production, has significantly contributed to the strong demand for power semiconductors. However, the current trend indicates a slowdown in the power semiconductor market.

According to TrendForce’s latest report, titled “Power Semiconductor Deceleration, Chinese Companies Breaking Through in 12-inch Wafers and IGBT,” it shared a comprehensive analysis of China’s role in the development of the power semiconductor industry. The following highlights summarize the key points of this report:

1. Slowdown in Chinese Foundries due to Downturn in Consumer Electronics and Communication Sectors

In the first half of 2023, prominent Chinese foundries—SMIC, Hua Hong Semiconductor, Nexchip, and SMEC—encountered a slowdown in revenue growth. Among them, only Hua Hong witnessed a marginal revenue increase, while SMIC, Nexchip, and SMEC experienced YoY revenue declines of 19.29%, 50.43%, and 24.08%, respectively. The overall performance of Chinese wafer fabs is entering a downward cycle due to a sluggish market in consumer electronics, PCs, and communication.

2. IGBT Emerges as the Growth Driver Amidst Deceleration in the Power Semiconductor Market

Despite a comparative growth with digital ICs, the overall growth in the power semiconductor market is decelerating. Hua Hong’s revenue from discrete devices increased by 33.04% YoY in the first half of 2023, yet the growth rate is lower than that of the same period in 2022. The number of top-ten listed power semiconductor companies with negative revenue growth has expanded from one in 2022 to four, and those with negative net profit growth increased from one to eight.

While the overall growth is slowing, IGBT remains the driving force for power semiconductors. Companies like Silan and CR Micro have initiated mass production of IGBT, experiencing a rapid growth rate in the IGBT business. Additionally, Wingtech is making its foray into the IGBT sector. Notably, between January and July 2023, 17 IGBT projects were initiated or signed, with a cumulative investment exceeding CNY 15 billion, indicating a swift expansion by Chinese companies in the IGBT domain.

3. China’s Power Semiconductor Giants Scale Up from 8-Inch to 12-Inch

Major Chinese power semiconductor players are transitioning from 8-inch to 12-inch wafers. Notably, Hua Hong has already implemented 12-inch capacity, and the expansion of the Wuxi Phase 2 project is underway. SMIC’s third-phase 12-inch special process wafer line produced its initial 10,000 wafers in June 2023. In the IDM sector, companies like Wingtech, Silan, and CR Micro are actively constructing 12-inch wafer fabs, with some of the capacity already in operation.

According to TechNews’ report, Apple, NVIDIA, AMD, Qualcomm, and MediaTek all utilize TSMC’s semiconductor processes for manufacturing their latest chips, with some potentially employing Samsung’s foundry, though typically not for flagship products.

With Samsung’s improved yield rates in recent months, the company is eager to secure a portion of the orders, particularly for the 3-nanometer GAA (Gate-All-Around) process.

Earlier market reports suggested that Qualcomm’s Snapdragon 8 Gen 4 might adopt a dual-foundry strategy, simultaneously utilizing TSMC’s N3E process technology and Samsung’s SF3E process technology.

However, both Qualcomm and MediaTek currently plan to employ TSMC’s second-generation 3-nanometer process technology (N3E) for manufacturing chips like the Snapdragon 8 Gen 4 and Dimensity 4, without pursuing a dual-foundry strategy at this time.

As of the end of June 2022, Samsung announced the commencement of production for 3-nanometer process chips at its Hwaseong Industrial Complex in South Korea. These chips incorporate a new GAA transistor architecture technology, rumored to be more energy-efficient compared to TSMC’s 3-nanometer FinFET technology. Despite this, in the realm of 3nm, Samsung has yet to secure substantial orders from major clients.

Interestingly, the company has seen more success in the 4nm domain. It is reported that Samsung has gradually addressed yield and various issues in the 4-nanometer process technology domain. The third generation of 4-nanometer process technology has seen improvements in performance, reduced power consumption, increased density, and achieved yields close to TSMC’s level. Market sources indicate that Samsung has gained recognition from companies like AMD and Tesla, securing new orders.

Currently, TSMC’s 3-nanometer process technology production capacity is ramping up, with an expected monthly capacity of 100,000 wafers by the end of 2024. The revenue contribution is projected to increase from the current 5% to 10%.

Meanwhile, Samsung plans to introduce the second generation of its 3-nanometer process technology, named SF3 (3GAP), in 2024. Building upon the existing SF3E, it aims for further optimization, and Samsung’s in-house Exynos 2500 is expected to be one of the first high-performance chips to adopt this new process technology.

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